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885 | decky | 1 | /* |
2 | * Copyright (C) 2005 Martin Decky |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
1003 | decky | 29 | #ifndef __ppc32_REGNAME_H__ |
30 | #define __ppc32_REGNAME_H__ |
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885 | decky | 31 | |
32 | /* Condition Register Bit Fields */ |
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33 | #define cr0 0 |
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34 | #define cr1 1 |
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35 | #define cr2 2 |
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36 | #define cr3 3 |
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37 | #define cr4 4 |
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38 | #define cr5 5 |
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39 | #define cr6 6 |
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40 | #define cr7 7 |
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41 | |||
42 | /* General Purpose Registers (GPRs) */ |
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43 | #define r0 0 |
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44 | #define r1 1 |
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45 | #define r2 2 |
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46 | #define r3 3 |
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47 | #define r4 4 |
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48 | #define r5 5 |
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49 | #define r6 6 |
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50 | #define r7 7 |
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51 | #define r8 8 |
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52 | #define r9 9 |
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53 | #define r10 10 |
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54 | #define r11 11 |
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55 | #define r12 12 |
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56 | #define r13 13 |
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57 | #define r14 14 |
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58 | #define r15 15 |
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59 | #define r16 16 |
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60 | #define r17 17 |
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61 | #define r18 18 |
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62 | #define r19 19 |
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63 | #define r20 20 |
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64 | #define r21 21 |
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65 | #define r22 22 |
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66 | #define r23 23 |
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67 | #define r24 24 |
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68 | #define r25 25 |
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69 | #define r26 26 |
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70 | #define r27 27 |
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71 | #define r28 28 |
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72 | #define r29 29 |
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73 | #define r30 30 |
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74 | #define r31 31 |
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75 | |||
76 | /* GPR Aliases */ |
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77 | #define sp 1 |
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78 | |||
79 | /* Floating Point Registers (FPRs) */ |
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80 | #define fr0 0 |
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81 | #define fr1 1 |
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82 | #define fr2 2 |
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83 | #define fr3 3 |
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84 | #define fr4 4 |
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85 | #define fr5 5 |
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86 | #define fr6 6 |
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87 | #define fr7 7 |
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88 | #define fr8 8 |
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89 | #define fr9 9 |
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90 | #define fr10 10 |
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91 | #define fr11 11 |
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92 | #define fr12 12 |
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93 | #define fr13 13 |
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94 | #define fr14 14 |
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95 | #define fr15 15 |
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96 | #define fr16 16 |
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97 | #define fr17 17 |
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98 | #define fr18 18 |
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99 | #define fr19 19 |
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100 | #define fr20 20 |
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101 | #define fr21 21 |
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102 | #define fr22 22 |
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103 | #define fr23 23 |
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104 | #define fr24 24 |
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105 | #define fr25 25 |
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106 | #define fr26 26 |
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107 | #define fr27 27 |
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108 | #define fr28 28 |
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109 | #define fr29 29 |
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110 | #define fr30 30 |
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111 | #define fr31 31 |
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112 | |||
113 | #define vr0 0 |
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114 | #define vr1 1 |
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115 | #define vr2 2 |
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116 | #define vr3 3 |
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117 | #define vr4 4 |
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118 | #define vr5 5 |
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119 | #define vr6 6 |
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120 | #define vr7 7 |
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121 | #define vr8 8 |
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122 | #define vr9 9 |
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123 | #define vr10 10 |
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124 | #define vr11 11 |
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125 | #define vr12 12 |
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126 | #define vr13 13 |
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127 | #define vr14 14 |
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128 | #define vr15 15 |
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129 | #define vr16 16 |
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130 | #define vr17 17 |
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131 | #define vr18 18 |
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132 | #define vr19 19 |
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133 | #define vr20 20 |
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134 | #define vr21 21 |
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135 | #define vr22 22 |
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136 | #define vr23 23 |
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137 | #define vr24 24 |
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138 | #define vr25 25 |
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139 | #define vr26 26 |
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140 | #define vr27 27 |
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141 | #define vr28 28 |
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142 | #define vr29 29 |
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143 | #define vr30 30 |
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144 | #define vr31 31 |
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145 | |||
146 | #define evr0 0 |
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147 | #define evr1 1 |
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148 | #define evr2 2 |
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149 | #define evr3 3 |
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150 | #define evr4 4 |
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151 | #define evr5 5 |
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152 | #define evr6 6 |
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153 | #define evr7 7 |
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154 | #define evr8 8 |
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155 | #define evr9 9 |
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156 | #define evr10 10 |
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157 | #define evr11 11 |
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158 | #define evr12 12 |
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159 | #define evr13 13 |
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160 | #define evr14 14 |
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161 | #define evr15 15 |
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162 | #define evr16 16 |
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163 | #define evr17 17 |
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164 | #define evr18 18 |
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165 | #define evr19 19 |
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166 | #define evr20 20 |
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167 | #define evr21 21 |
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168 | #define evr22 22 |
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169 | #define evr23 23 |
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170 | #define evr24 24 |
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171 | #define evr25 25 |
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172 | #define evr26 26 |
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173 | #define evr27 27 |
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174 | #define evr28 28 |
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175 | #define evr29 29 |
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176 | #define evr30 30 |
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177 | #define evr31 31 |
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178 | |||
179 | /* Special Purpose Registers (SPRs) */ |
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180 | #define xer 1 |
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181 | #define lr 8 |
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182 | #define ctr 9 |
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183 | #define dec 22 |
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1058 | decky | 184 | #define sdr1 25 |
885 | decky | 185 | #define srr0 26 |
186 | #define srr1 27 |
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187 | #define sprg0 272 |
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188 | #define sprg1 273 |
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189 | #define sprg2 274 |
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190 | #define sprg3 275 |
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191 | #define prv 287 |
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1068 | decky | 192 | #define ibat0u 528 |
193 | #define ibat0l 529 |
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194 | #define ibat1u 530 |
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195 | #define ibat1l 531 |
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196 | #define ibat2u 532 |
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197 | #define ibat2l 533 |
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198 | #define ibat3u 534 |
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199 | #define ibat3l 535 |
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200 | #define dbat0u 536 |
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201 | #define dbat0l 537 |
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202 | #define dbat1u 538 |
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203 | #define dbat1l 539 |
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204 | #define dbat2u 540 |
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205 | #define dbat2l 541 |
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206 | #define dbat3u 542 |
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207 | #define dbat3l 543 |
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1003 | decky | 208 | #define hid0 1008 |
885 | decky | 209 | |
1003 | decky | 210 | /* MSR bits */ |
211 | #define msr_ir (1 << 4) |
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212 | #define msr_dr (1 << 5) |
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213 | |||
214 | /* HID0 bits */ |
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215 | #define hid0_ice (1 << 15) |
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216 | #define hid0_dce (1 << 14) |
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217 | #define hid0_icfi (1 << 11) |
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218 | #define hid0_dci (1 << 10) |
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219 | |||
885 | decky | 220 | #endif |