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452 decky 1 
## General configuration directives
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# Architecture
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@ "ia32" Intel IA-32
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@ "amd64" AMD64/Intel EM64T
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@ "ia64" Intel IA-64
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@ "mips32" MIPS 32-bit
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@ "ppc32" PowerPC 32-bit
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@ "sparc64" Sun UltraSPARC
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! ARCH (choice)
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# IA32 Compiler
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@ "cross" Cross-compiler
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@ "native" Native
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! [ARCH=ia32] IA32_COMPILER (choice)
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% [ARCH=ia32] SAVEAS IA32_COMPILER COMPILER
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# AMD64 Compiler
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@ "cross" Cross-compiler
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@ "native" Native
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! [ARCH=amd64] AMD64_COMPILER (choice)
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% [ARCH=amd64] SAVEAS AMD64_COMPILER COMPILER
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# Compiler
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@ "cross" Cross-compiler
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@ "native" Native
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! [(ARCH!=amd64)&(ARCH!=ia32)] OTHER_COMPILER (choice)
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% [(ARCH!=amd64)&(ARCH!=ia32)] SAVEAS OTHER_COMPILER COMPILER
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# CPU type
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@ "pentium4" Pentium 4
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@ "pentium3" Pentium 3
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@ "athlon-xp" Athlon XP
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@ "athlon-mp" Athlon MP
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@ "prescott" Prescott
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! [ARCH=ia32] IA32_CPU (choice)
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# MIPS Machine Type
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@ "msim" MSIM Simulator
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@ "simics" Virtutech Simics simulator
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@ "lgxemul" GXEmul Little Endian
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@ "bgxemul" GXEmul Big Endian
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@ "indy" SGI Indy
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! [ARCH=mips32] MIPS_MACHINE (choice)
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# Framebuffer support
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! [(ARCH=mips32&MIPS_MACHINE=lgxemul)|(ARCH=mips32&MIPS_MACHINE=bgxemul)] CONFIG_FB (y/n)
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# Support for SMP
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! [ARCH=ia32|ARCH=amd64] CONFIG_SMP (y/n)
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# Improved support for hyperthreading
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! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_HT (y/n)
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# Simics BIOS AP boot fix
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! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n)
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# Lazy FPU context switching
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! [(ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64] CONFIG_FPU_LAZY (y/n)
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# Power off on halt
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! [ARCH=ppc32] CONFIG_POWEROFF (y/n)
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## Debugging configuration directives
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# General debuging and assert checking
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! CONFIG_DEBUG (y/n)
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# Deadlock detection support for spinlocks
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! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n)
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## Run-time configuration directives
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# Kernel test type
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@ "" No test
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@ "atomic/atomic1" Test of atomic operations.
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@ "synch/rwlock1" Read write test 1
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@ "synch/rwlock2" Read write test 2
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@ "synch/rwlock3" Read write test 3
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@ "synch/rwlock4" Read write test 4
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@ "synch/rwlock5" Read write test 5
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@ "synch/semaphore1" Semaphore test 1
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@ "synch/semaphore2" Sempahore test 2
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@ [ARCH=ia32|ARCH=amd64|ARCH=ia64] "fpu/fpu1" Intel fpu test 1
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@ [ARCH=ia32|ARCH=amd64] "fpu/sse1" Intel Sse test 1
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@ [ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics] "fpu/mips1" Mips FPU test 1
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@ "print/print1" Printf test 1
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@ "thread/thread1" Thread test 1
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@ "mm/mapping1" Mapping test 1
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@ "mm/falloc1" Frame Allocation test 1
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@ "mm/falloc2" Frame Allocation test 2
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@ "mm/slab1" SLAB test1 - No CPU-cache
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@ "mm/slab2" SLAB test2 - SMP CPU cache
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@ "fault/fault1" Write to NULL (maybe page fault)
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@ [ARCH=ia64] "mm/purge1" Itanium TLB purge test
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@ [ARCH=mips32] "debug/mips1" Mips breakpoint-debug test
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! CONFIG_TEST (choice)