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1281 palkovsky 1
/*
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 * Copyright (C) 2006 Ondrej Palkovsky
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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1284 palkovsky 29
/** IRQ notification framework
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 *
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 * This framework allows applications to register to receive a notification
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 * when interrupt is detected. The application may provide a simple 'top-half'
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 * handler as part of its registration, which can perform simple operations
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 * (read/write port/memory, add information to notification ipc message).
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 *
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 * The structure of a notification message is as follows:
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 * - METHOD: IPC_M_INTERRUPT
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 * - ARG1: interrupt number
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 * - ARG2: payload modified by a 'top-half' handler
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 * - ARG3: interrupt counter (may be needed to assure correct order
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 *         in multithreaded drivers)
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 */
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1281 palkovsky 44
#include <arch.h>
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#include <mm/slab.h>
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#include <errno.h>
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#include <ipc/ipc.h>
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#include <ipc/irq.h>
1284 palkovsky 49
#include <atomic.h>
1288 jermar 50
#include <syscall/copy.h>
1507 vana 51
#include <console/console.h>
1281 palkovsky 52
 
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typedef struct {
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    SPINLOCK_DECLARE(lock);
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    answerbox_t *box;
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    irq_code_t *code;
1284 palkovsky 57
    atomic_t counter;
1281 palkovsky 58
} ipc_irq_t;
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60
 
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static ipc_irq_t *irq_conns = NULL;
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static int irq_conns_size;
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#include <print.h>
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/* Execute code associated with IRQ notification */
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static void code_execute(call_t *call, irq_code_t *code)
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{
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    int i;
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70
    if (!code)
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        return;
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    for (i=0; i < code->cmdcount;i++) {
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        switch (code->cmds[i].cmd) {
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        case CMD_MEM_READ_1:
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            IPC_SET_ARG2(call->data, *((__u8 *)code->cmds[i].addr));
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            break;
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        case CMD_MEM_READ_2:
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            IPC_SET_ARG2(call->data, *((__u16 *)code->cmds[i].addr));
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            break;
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        case CMD_MEM_READ_4:
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            IPC_SET_ARG2(call->data, *((__u32 *)code->cmds[i].addr));
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            break;
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        case CMD_MEM_READ_8:
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            IPC_SET_ARG2(call->data, *((__u64 *)code->cmds[i].addr));
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            break;
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        case CMD_MEM_WRITE_1:
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            *((__u8 *)code->cmds[i].addr) = code->cmds[i].value;
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            break;
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        case CMD_MEM_WRITE_2:
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            *((__u16 *)code->cmds[i].addr) = code->cmds[i].value;
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            break;
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        case CMD_MEM_WRITE_4:
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            *((__u32 *)code->cmds[i].addr) = code->cmds[i].value;
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            break;
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        case CMD_MEM_WRITE_8:
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            *((__u64 *)code->cmds[i].addr) = code->cmds[i].value;
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            break;
1284 palkovsky 99
#if defined(ia32) || defined(amd64)
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        case CMD_PORT_READ_1:
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            IPC_SET_ARG2(call->data, inb((long)code->cmds[i].addr));
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            break;
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        case CMD_PORT_WRITE_1:
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            outb((long)code->cmds[i].addr, code->cmds[i].value);
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            break;
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#endif
1507 vana 107
#if defined(ia64) 
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        case CMD_IA64_GETCHAR:
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            IPC_SET_ARG2(call->data, _getc(&ski_uconsole));
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            break;
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#endif
1281 palkovsky 112
        default:
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            break;
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        }
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    }
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}
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static void code_free(irq_code_t *code)
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{
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    if (code) {
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        free(code->cmds);
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        free(code);
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    }
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}
125
 
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static irq_code_t * code_from_uspace(irq_code_t *ucode)
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{
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    irq_code_t *code;
129
    irq_cmd_t *ucmds;
1288 jermar 130
    int rc;
1281 palkovsky 131
 
132
    code = malloc(sizeof(*code), 0);
1288 jermar 133
    rc = copy_from_uspace(code, ucode, sizeof(*code));
134
    if (rc != 0) {
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        free(code);
136
        return NULL;
137
    }
1281 palkovsky 138
 
139
    if (code->cmdcount > IRQ_MAX_PROG_SIZE) {
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        free(code);
141
        return NULL;
142
    }
143
    ucmds = code->cmds;
144
    code->cmds = malloc(sizeof(code->cmds[0]) * (code->cmdcount), 0);
1288 jermar 145
    rc = copy_from_uspace(code->cmds, ucmds, sizeof(code->cmds[0]) * (code->cmdcount));
146
    if (rc != 0) {
147
        free(code->cmds);
148
        free(code);
149
        return NULL;
150
    }
1281 palkovsky 151
 
152
    return code;
153
}
154
 
155
/** Unregister task from irq */
156
void ipc_irq_unregister(answerbox_t *box, int irq)
157
{
158
    ipl_t ipl;
159
 
160
    ipl = interrupts_disable();
161
    spinlock_lock(&irq_conns[irq].lock);
162
    if (irq_conns[irq].box == box) {
163
        irq_conns[irq].box = NULL;
164
        code_free(irq_conns[irq].code);
165
        irq_conns[irq].code = NULL;
166
    }
167
 
168
    spinlock_unlock(&irq_conns[irq].lock);
169
    interrupts_restore(ipl);
170
}
171
 
172
/** Register an answerbox as a receiving end of interrupts notifications */
173
int ipc_irq_register(answerbox_t *box, int irq, irq_code_t *ucode)
174
{
175
    ipl_t ipl;
176
    irq_code_t *code;
177
 
178
    ASSERT(irq_conns);
179
 
180
    if (ucode) {
181
        code = code_from_uspace(ucode);
182
        if (!code)
183
            return EBADMEM;
184
    } else
185
        code = NULL;
186
 
187
    ipl = interrupts_disable();
188
    spinlock_lock(&irq_conns[irq].lock);
189
 
190
    if (irq_conns[irq].box) {
191
        spinlock_unlock(&irq_conns[irq].lock);
192
        interrupts_restore(ipl);
193
        code_free(code);
194
        return EEXISTS;
195
    }
196
    irq_conns[irq].box = box;
197
    irq_conns[irq].code = code;
1284 palkovsky 198
    atomic_set(&irq_conns[irq].counter, 0);
1281 palkovsky 199
    spinlock_unlock(&irq_conns[irq].lock);
200
    interrupts_restore(ipl);
201
 
202
    return 0;
203
}
204
 
205
/** Notify process that an irq had happend
206
 *
207
 * We expect interrupts to be disabled
208
 */
209
void ipc_irq_send_notif(int irq)
210
{
211
    call_t *call;
212
 
213
    ASSERT(irq_conns);
214
    spinlock_lock(&irq_conns[irq].lock);
215
 
216
    if (irq_conns[irq].box) {
217
        call = ipc_call_alloc(FRAME_ATOMIC);
218
        call->flags |= IPC_CALL_NOTIF;
219
        IPC_SET_METHOD(call->data, IPC_M_INTERRUPT);
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        IPC_SET_ARG1(call->data, irq);
1284 palkovsky 221
        IPC_SET_ARG3(call->data, atomic_preinc(&irq_conns[irq].counter));
1281 palkovsky 222
 
223
        /* Execute code to handle irq */
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        code_execute(call, irq_conns[irq].code);
225
 
226
        spinlock_lock(&irq_conns[irq].box->irq_lock);
227
        list_append(&call->list, &irq_conns[irq].box->irq_notifs);
228
        spinlock_unlock(&irq_conns[irq].box->irq_lock);
229
 
230
        waitq_wakeup(&irq_conns[irq].box->wq, 0);
231
    }
232
 
233
    spinlock_unlock(&irq_conns[irq].lock);
234
}
235
 
236
 
237
/** Initialize table of interrupt handlers */
238
void ipc_irq_make_table(int irqcount)
239
{
240
    int i;
241
 
242
    irq_conns_size = irqcount;
243
    irq_conns = malloc(irqcount * (sizeof(*irq_conns)), 0);
244
    for (i=0; i < irqcount; i++) {
245
        spinlock_initialize(&irq_conns[i].lock, "irq_ipc_lock");
246
        irq_conns[i].box = NULL;
247
        irq_conns[i].code = NULL;
248
    }
249
}
250
 
251
/** Disconnect all irq's notifications
252
 *
253
 * TODO: It may be better to do some linked list, so that
254
 *       we wouldn't need to go through whole array every cleanup
255
 */
256
void ipc_irq_cleanup(answerbox_t *box)
257
{
258
    int i;
259
    ipl_t ipl;
260
 
261
    for (i=0; i < irq_conns_size; i++) {
262
        ipl = interrupts_disable();
263
        spinlock_lock(&irq_conns[i].lock);
264
        if (irq_conns[i].box == box)
265
            irq_conns[i].box = NULL;
266
        spinlock_unlock(&irq_conns[i].lock);
267
        interrupts_restore(ipl);
268
    }
269
}