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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 987 | decky | 1 | # |
| 2 | # Copyright (C) 2006 Martin Decky |
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| 3 | # All rights reserved. |
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| 4 | # |
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| 5 | # Redistribution and use in source and binary forms, with or without |
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| 6 | # modification, are permitted provided that the following conditions |
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| 7 | # are met: |
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| 8 | # |
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| 9 | # - Redistributions of source code must retain the above copyright |
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| 10 | # notice, this list of conditions and the following disclaimer. |
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| 11 | # - Redistributions in binary form must reproduce the above copyright |
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| 12 | # notice, this list of conditions and the following disclaimer in the |
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| 13 | # documentation and/or other materials provided with the distribution. |
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| 14 | # - The name of the author may not be used to endorse or promote products |
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| 15 | # derived from this software without specific prior written permission. |
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| 16 | # |
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| 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | # |
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| 28 | |||
| 29 | #include <arch/asm/regname.h> |
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| 1004 | decky | 30 | #include <arch/mm/page.h> |
| 987 | decky | 31 | |
| 32 | .section K_UNMAPPED_TEXT_START, "ax" |
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| 33 | |||
| 34 | .org 0x100 |
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| 35 | .global exc_system_reset |
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| 36 | exc_system_reset: |
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| 37 | b exc_system_reset |
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| 38 | |||
| 39 | .org 0x200 |
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| 40 | .global exc_machine_check |
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| 41 | exc_machine_check: |
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| 42 | b exc_machine_check |
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| 43 | |||
| 44 | .org 0x300 |
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| 45 | .global exc_data_storage |
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| 46 | exc_data_storage: |
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| 47 | b exc_data_storage |
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| 48 | |||
| 49 | .org 0x380 |
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| 50 | .global exc_data_segment |
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| 51 | exc_data_segment: |
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| 52 | b exc_data_segment |
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| 53 | |||
| 54 | .org 0x400 |
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| 55 | .global exc_instruction_storage |
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| 56 | exc_instruction_storage: |
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| 57 | b exc_instruction_storage |
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| 58 | |||
| 59 | .org 0x480 |
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| 60 | .global exc_instruction_segment |
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| 61 | exc_instruction_segment: |
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| 62 | b exc_instruction_segment |
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| 63 | |||
| 64 | .org 0x500 |
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| 65 | .global exc_external |
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| 66 | exc_external: |
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| 67 | b exc_external |
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| 68 | |||
| 69 | .org 0x600 |
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| 70 | .global exc_alignment |
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| 71 | exc_alignment: |
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| 72 | b exc_alignment |
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| 73 | |||
| 74 | .org 0x700 |
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| 75 | .global exc_program |
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| 76 | exc_program: |
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| 77 | b exc_program |
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| 78 | |||
| 79 | .org 0x800 |
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| 80 | .global exc_fp_unavailable |
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| 81 | exc_fp_unavailable: |
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| 82 | b exc_fp_unavailable |
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| 83 | |||
| 84 | .org 0x900 |
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| 85 | .global exc_decrementer |
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| 86 | exc_decrementer: |
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| 1004 | decky | 87 | mtspr sprg1, sp |
| 88 | |||
| 89 | subis sp, sp, 0x8000 |
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| 90 | |||
| 91 | subi sp, sp, 144 |
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| 92 | stw r0, 0(sp) |
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| 93 | stw r2, 4(sp) |
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| 94 | stw r3, 8(sp) |
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| 95 | stw r4, 12(sp) |
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| 96 | stw r5, 16(sp) |
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| 97 | stw r6, 20(sp) |
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| 98 | stw r7, 24(sp) |
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| 99 | stw r8, 28(sp) |
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| 100 | stw r9, 32(sp) |
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| 101 | stw r10, 36(sp) |
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| 102 | stw r11, 40(sp) |
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| 103 | stw r12, 44(sp) |
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| 104 | stw r13, 48(sp) |
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| 105 | stw r14, 52(sp) |
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| 106 | stw r15, 56(sp) |
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| 107 | stw r16, 60(sp) |
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| 108 | stw r17, 64(sp) |
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| 109 | stw r18, 68(sp) |
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| 110 | stw r19, 72(sp) |
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| 111 | stw r20, 76(sp) |
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| 112 | stw r21, 80(sp) |
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| 113 | stw r22, 84(sp) |
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| 114 | stw r23, 88(sp) |
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| 115 | stw r24, 92(sp) |
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| 116 | stw r25, 96(sp) |
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| 117 | stw r26, 100(sp) |
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| 118 | stw r27, 104(sp) |
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| 119 | stw r28, 108(sp) |
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| 120 | stw r29, 112(sp) |
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| 121 | stw r30, 116(sp) |
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| 122 | stw r31, 120(sp) |
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| 123 | |||
| 124 | mfspr r3, srr0 |
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| 125 | stw r3, 124(sp) |
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| 126 | |||
| 127 | mfspr r3, srr1 |
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| 128 | stw r3, 128(sp) |
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| 129 | |||
| 130 | mflr r3 |
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| 131 | stw r3, 132(sp) |
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| 132 | |||
| 133 | mfcr r3 |
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| 134 | stw r3, 136(sp) |
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| 135 | |||
| 136 | mfctr r3 |
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| 137 | stw r3, 140(sp) |
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| 138 | |||
| 139 | mfxer r3 |
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| 140 | stw r3, 144(sp) |
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| 141 | |||
| 142 | lis r3, exc_dispatch@ha |
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| 143 | addi r3, r3, exc_dispatch@l |
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| 144 | mtspr srr0, r3 |
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| 145 | |||
| 146 | mfmsr r3 |
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| 147 | ori r3, r3, (msr_ir | msr_dr)@l |
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| 148 | mtspr srr1, r3 |
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| 149 | |||
| 150 | lis r3, iret@ha |
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| 151 | addi r3, r3, iret@l |
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| 152 | mtlr r3 |
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| 153 | |||
| 154 | addis sp, sp, 0x8000 |
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| 155 | li r3, 10 |
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| 990 | decky | 156 | rfi |
| 987 | decky | 157 | |
| 158 | .org 0xa00 |
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| 159 | .global exc_reserved0 |
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| 160 | exc_reserved0: |
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| 161 | b exc_reserved0 |
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| 162 | |||
| 163 | .org 0xb00 |
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| 164 | .global exc_reserved1 |
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| 165 | exc_reserved1: |
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| 166 | b exc_reserved1 |
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| 167 | |||
| 168 | .org 0xc00 |
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| 169 | .global exc_syscall |
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| 170 | exc_syscall: |
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| 171 | b exc_syscall |
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| 172 | |||
| 173 | .org 0xd00 |
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| 174 | .global exc_trace |
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| 175 | exc_trace: |
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| 176 | b exc_trace |