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1 | jermar | 1 | /* |
319 | jermar | 2 | * Copyright (C) 2003-2004 Jakub Jermar |
1 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
29 | #include <arch/exception.h> |
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195 | vana | 30 | #include <arch/interrupt.h> |
1 | jermar | 31 | #include <panic.h> |
32 | #include <arch/cp0.h> |
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33 | #include <arch/types.h> |
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34 | #include <arch.h> |
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227 | jermar | 35 | #include <debug.h> |
391 | jermar | 36 | #include <proc/thread.h> |
1 | jermar | 37 | |
317 | palkovsky | 38 | void exception(struct exception_regdump *pstate) |
1 | jermar | 39 | { |
330 | palkovsky | 40 | int cause; |
1 | jermar | 41 | int excno; |
123 | decky | 42 | __u32 epc_shift = 0; |
213 | jermar | 43 | |
227 | jermar | 44 | ASSERT(CPU != NULL); |
45 | |||
213 | jermar | 46 | /* |
47 | * NOTE ON OPERATION ORDERING |
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48 | * |
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413 | jermar | 49 | * On entry, interrupts_disable() must be called before |
317 | palkovsky | 50 | * exception bit is cleared. |
213 | jermar | 51 | */ |
52 | |||
413 | jermar | 53 | interrupts_disable(); |
313 | palkovsky | 54 | cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit | |
55 | cp0_status_um_bit)); |
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327 | palkovsky | 56 | |
326 | palkovsky | 57 | /* Save pstate so that the threads can access it */ |
327 | palkovsky | 58 | /* If THREAD->pstate is set, this is nested exception, |
59 | * do not rewrite it |
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60 | */ |
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61 | if (THREAD && !THREAD->pstate) |
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326 | palkovsky | 62 | THREAD->pstate = pstate; |
1 | jermar | 63 | |
330 | palkovsky | 64 | cause = cp0_cause_read(); |
65 | excno = cp0_cause_excno(cause); |
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1 | jermar | 66 | /* decode exception number and process the exception */ |
330 | palkovsky | 67 | switch (excno) { |
123 | decky | 68 | case EXC_Int: |
332 | palkovsky | 69 | interrupt(pstate); |
123 | decky | 70 | break; |
1 | jermar | 71 | case EXC_TLBL: |
123 | decky | 72 | case EXC_TLBS: |
317 | palkovsky | 73 | tlb_invalid(pstate); |
123 | decky | 74 | break; |
327 | palkovsky | 75 | case EXC_CpU: |
458 | decky | 76 | #ifdef CONFIG_FPU_LAZY |
330 | palkovsky | 77 | if (cp0_cause_coperr(cause) == fpu_cop_id) |
78 | scheduler_fpu_lazy_request(); |
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79 | else |
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327 | palkovsky | 80 | #endif |
330 | palkovsky | 81 | panic("unhandled Coprocessor Unusable Exception\n"); |
327 | palkovsky | 82 | break; |
123 | decky | 83 | case EXC_Mod: |
389 | jermar | 84 | tlb_modified(pstate); |
123 | decky | 85 | break; |
86 | case EXC_AdEL: |
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87 | panic("unhandled Address Error Exception - load or instruction fetch\n"); |
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88 | break; |
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89 | case EXC_AdES: |
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90 | panic("unhandled Address Error Exception - store\n"); |
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91 | break; |
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92 | case EXC_IBE: |
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93 | panic("unhandled Bus Error Exception - fetch instruction\n"); |
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94 | break; |
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95 | case EXC_DBE: |
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96 | panic("unhandled Bus Error Exception - data reference: load or store\n"); |
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97 | break; |
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98 | case EXC_Bp: |
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99 | /* it is necessary to not re-execute BREAK instruction after returning from Exception handler |
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100 | (see page 138 in R4000 Manual for more information) */ |
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101 | epc_shift = 4; |
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102 | break; |
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103 | case EXC_RI: |
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104 | panic("unhandled Reserved Instruction Exception\n"); |
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105 | break; |
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106 | case EXC_Ov: |
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107 | panic("unhandled Arithmetic Overflow Exception\n"); |
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108 | break; |
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109 | case EXC_Tr: |
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110 | panic("unhandled Trap Exception\n"); |
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111 | break; |
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112 | case EXC_VCEI: |
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113 | panic("unhandled Virtual Coherency Exception - instruction\n"); |
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114 | break; |
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115 | case EXC_FPE: |
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116 | panic("unhandled Floating-Point Exception\n"); |
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117 | break; |
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118 | case EXC_WATCH: |
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119 | panic("unhandled reference to WatchHi/WatchLo address\n"); |
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120 | break; |
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121 | case EXC_VCED: |
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122 | panic("unhandled Virtual Coherency Exception - data\n"); |
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123 | break; |
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124 | default: |
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125 | panic("unhandled exception %d\n", excno); |
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1 | jermar | 126 | } |
127 | |||
317 | palkovsky | 128 | pstate->epc += epc_shift; |
327 | palkovsky | 129 | /* Set to NULL, so that we can still support nested |
130 | * exceptions |
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131 | * TODO: We should probably set EXL bit before this command, |
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132 | * nesting. On the other hand, if some exception occurs between |
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133 | * here and ERET, it won't set anything on the pstate anyway. |
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134 | */ |
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326 | palkovsky | 135 | if (THREAD) |
136 | THREAD->pstate = NULL; |
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1 | jermar | 137 | } |