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/*
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 * Copyright (C) 2003-2004 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#include <arch/exception.h>
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#include <arch/interrupt.h>
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#include <panic.h>
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#include <arch/cp0.h>
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#include <arch/types.h>
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#include <arch.h>
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#include <debug.h>
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void exception(struct exception_regdump *pstate)
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{
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    int excno;
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    __u32 epc_shift = 0;
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    ASSERT(CPU != NULL);
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    /*
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     * NOTE ON OPERATION ORDERING
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     *
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     * On entry, cpu_priority_high() must be called before
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     * exception bit is cleared.
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     */
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    cpu_priority_high();
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    cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit |
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                        cp0_status_um_bit));
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    /* decode exception number and process the exception */
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    switch (excno = (cp0_cause_read() >> 2) & 0x1f) {
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        case EXC_Int:
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            interrupt();
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            break;
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        case EXC_TLBL:
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        case EXC_TLBS:
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            tlb_invalid(pstate);
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            break;
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        case EXC_Mod:
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            panic("unhandled TLB Modification Exception\n");
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            break;
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        case EXC_AdEL:
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            panic("unhandled Address Error Exception - load or instruction fetch\n");
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            break;
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        case EXC_AdES:
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            panic("unhandled Address Error Exception - store\n");
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            break;
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        case EXC_IBE:
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            panic("unhandled Bus Error Exception - fetch instruction\n");
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            break;
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        case EXC_DBE:
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            panic("unhandled Bus Error Exception - data reference: load or store\n");
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            break;
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        case EXC_Bp:
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            /* it is necessary to not re-execute BREAK instruction after returning from Exception handler
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               (see page 138 in R4000 Manual for more information) */
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            epc_shift = 4;
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            break;
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        case EXC_RI:
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            panic("unhandled Reserved Instruction Exception\n");
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            break;
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        case EXC_CpU:
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            panic("unhandled Coprocessor Unusable Exception\n");
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            break;
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        case EXC_Ov:
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            panic("unhandled Arithmetic Overflow Exception\n");
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            break;
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        case EXC_Tr:
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            panic("unhandled Trap Exception\n");
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            break;
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        case EXC_VCEI:
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            panic("unhandled Virtual Coherency Exception - instruction\n");
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            break;
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        case EXC_FPE:
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            panic("unhandled Floating-Point Exception\n");
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            break;
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        case EXC_WATCH:
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            panic("unhandled reference to WatchHi/WatchLo address\n");
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            break;
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        case EXC_VCED:
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            panic("unhandled Virtual Coherency Exception - data\n");
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            break;
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        default:
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            panic("unhandled exception %d\n", excno);
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    }
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    pstate->epc += epc_shift;
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}