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684 jermar 1
/*
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 * Copyright (C) 2006 Jakub Jermar
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 * Copyright (C) 2006 Jakub Vana
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#include <arch/mm/page.h>
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#include <genarch/mm/page_ht.h>
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#include <mm/asid.h>
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#include <arch/mm/asid.h>
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#include <arch/types.h>
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#include <typedefs.h>
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#include <print.h>
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#include <mm/page.h>
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#include <mm/frame.h>
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#include <config.h>
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#include <panic.h>
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#include <arch/asm.h>
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#include <arch/barrier.h>
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#include <memstr.h>
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static void set_vhpt_environment(void);
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/** Initialize ia64 virtual address translation subsystem. */
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void page_arch_init(void)
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{
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    page_operations = &page_ht_operations;
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    pk_disable();
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    set_vhpt_environment();
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}
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/** Initialize VHPT and region registers. */
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void set_vhpt_environment(void)
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{
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    region_register rr;
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    pta_register pta;  
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    int i;
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    /*
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     * First set up kernel region register.
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     */
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    rr.word = rr_read(VRN_KERNEL);
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    rr.map.ve = 0;                  /* disable VHPT walker */
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    rr.map.ps = PAGE_WIDTH;
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    rr.map.rid = ASID_KERNEL;
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    rr_write(VRN_KERNEL, rr.word);
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    srlz_i();
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    srlz_d();
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747 jermar 73
    /*
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     * And invalidate the rest of region register.
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     */
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    for(i = 0; i < REGION_REGISTERS; i++) {
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        /* skip kernel rr */
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        if (i == VRN_KERNEL)
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            continue;
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        rr.word == rr_read(i);
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        rr.map.ve = 0;      /* disable VHPT walker */
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        rr.map.rid = ASID_INVALID;
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        rr_write(i, rr.word);
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        srlz_i();
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        srlz_d();
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    }
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    /*
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     * Allocate VHPT and invalidate all its entries.
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     */
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    page_ht = (pte_t *) frame_alloc(FRAME_KA, VHPT_WIDTH - FRAME_WIDTH, NULL);
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    memsetb((__address) page_ht, VHPT_SIZE, 0);
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    ht_invalidate_all();   
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    /*
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     * Set up PTA register.
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     */
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    pta.word = pta_read();
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    pta.map.ve = 0;                   /* disable VHPT walker */
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    pta.map.vf = 1;                   /* large entry format */
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    pta.map.size = VHPT_WIDTH;
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    pta.map.base = ((__address) page_ht) >> PTA_BASE_SHIFT;
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    pta_write(pta.word);
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    srlz_i();
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    srlz_d();
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}
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/** Calculate address of collision chain from VPN and ASID.
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 *
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 * Interrupts must be disabled.
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 *
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 * @param page Address of virtual page including VRN bits.
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 * @param asid Address space identifier.
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 *
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 * @return Head of VHPT collision chain for page and asid.
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 */
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pte_t *vhpt_hash(__address page, asid_t asid)
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{
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    region_register rr_save, rr;
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    index_t vrn;
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    rid_t rid;
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    pte_t *t;
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    vrn = page >> VRN_SHIFT;
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    rid = ASID2RID(asid, vrn);
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    rr_save.word = rr_read(vrn);
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    if (rr_save.map.rid == rid) {
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        /*
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         * The RID is already in place, compute thash and return.
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         */
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        t = (pte_t *) thash(page);
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        return t;
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    }
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    /*
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     * The RID must be written to some region register.
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     * To speed things up, register indexed by vrn is used.
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     */
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    rr.word = rr_save.word;
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    rr.map.rid = rid;
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    rr_write(vrn, rr.word);
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    srlz_i();
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    t = (pte_t *) thash(page);
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    rr_write(vrn, rr_save.word);
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    srlz_i();
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    srlz_d();
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150
    return t;
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}
749 jermar 152
 
153
/** Compare ASID and VPN against PTE.
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 *
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 * Interrupts must be disabled.
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 *
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 * @param page Address of virtual page including VRN bits.
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 * @param asid Address space identifier.
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 *
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 * @return True if page and asid match the page and asid of t, false otherwise.
161
 */
162
bool vhpt_compare(__address page, asid_t asid, pte_t *t)
163
{
164
    region_register rr_save, rr;   
165
    index_t vrn;
166
    rid_t rid;
167
    bool match;
168
 
169
    ASSERT(t);
170
 
171
    vrn = page >> VRN_SHIFT;
172
    rid = ASID2RID(asid, vrn);
173
 
174
    rr_save.word = rr_read(vrn);
175
    if (rr_save.map.rid == rid) {
176
        /*
177
         * The RID is already in place, compare ttag with t and return.
178
         */
179
        return ttag(page) == t->present.tag.tag_word;
180
    }
181
 
182
    /*
183
     * The RID must be written to some region register.
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     * To speed things up, register indexed by vrn is used.
185
     */
186
    rr.word = rr_save.word;
187
    rr.map.rid = rid;
188
    rr_write(vrn, rr.word);
189
    srlz_i();
190
    match = (ttag(page) == t->present.tag.tag_word);
191
    rr_write(vrn, rr_save.word);
192
    srlz_i();
193
    srlz_d();
194
 
195
    return match;      
196
}
197
 
198
/** Set up one VHPT entry.
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 *
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 * @param t VHPT entry to be set up.
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 * @param page Virtual address of the page mapped by the entry.
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 * @param asid Address space identifier of the address space to which page belongs.
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 * @param frame Physical address of the frame to wich page is mapped.
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 * @param flags Different flags for the mapping.
205
 */
206
void vhpt_set_record(pte_t *t, __address page, asid_t asid, __address frame, int flags)
207
{
208
    region_register rr_save, rr;   
209
    index_t vrn;
210
    rid_t rid;
211
    __u64 tag;
212
 
213
    ASSERT(t);
214
 
215
    vrn = page >> VRN_SHIFT;
216
    rid = ASID2RID(asid, vrn);
217
 
218
    /*
219
     * Compute ttag.
220
     */
221
    rr_save.word = rr_read(vrn);
222
    rr.word = rr_save.word;
223
    rr.map.rid = rid;
224
    rr_write(vrn, rr.word);
225
    srlz_i();
226
    tag = ttag(page);
227
    rr_write(vrn, rr_save.word);
228
    srlz_i();
229
    srlz_d();
230
 
231
    /*
232
     * Clear the entry.
233
     */
234
    t->word[0] = 0;
235
    t->word[1] = 0;
236
    t->word[2] = 0;
237
    t->word[3] = 0;
238
 
239
    t->present.p = true;
240
    t->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE;
241
    t->present.a = false;   /* not accessed */
242
    t->present.d = false;   /* not dirty */
243
    t->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
244
    t->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
245
    t->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
246
    t->present.ppn = frame >> PPN_SHIFT;
247
    t->present.ed = false;  /* exception not deffered */
248
    t->present.ps = PAGE_WIDTH;
249
    t->present.key = 0;
250
    t->present.tag.tag_word = tag;
251
    t->present.next = NULL;
252
}