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1 jermar 1
/*
2
 * Copyright (C) 2001-2004 Jakub Jermar
3
 * All rights reserved.
4
 *
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
7
 * are met:
8
 *
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
28
 
29
#ifdef __SMP__
30
 
31
#include <arch/pm.h>
32
#include <config.h>
33
#include <print.h>
34
#include <panic.h>
11 jermar 35
#include <arch/smp/mp.h>
36
#include <arch/smp/ap.h>
37
#include <arch/smp/apic.h>
1 jermar 38
#include <func.h>
39
#include <arch/types.h>
40
#include <typedefs.h>
41
#include <synch/waitq.h>
42
#include <time/delay.h>
43
#include <mm/heap.h>
44
#include <mm/page.h>
45
#include <mm/frame.h>
46
#include <cpu.h>
47
#include <arch/i8259.h>
48
#include <arch/asm.h>
29 jermar 49
#include <arch/acpi/madt.h>
1 jermar 50
 
51
/*
52
 * Multi-Processor Specification detection code.
53
 */
54
 
55
#define	FS_SIGNATURE	0x5f504d5f
56
#define CT_SIGNATURE 	0x504d4350
57
 
58
int mp_fs_check(__u8 *base);
59
int mp_ct_check(void);
60
 
61
int configure_via_ct(void);
62
int configure_via_default(__u8 n);
63
 
64
int ct_processor_entry(struct __processor_entry *pr);
65
void ct_bus_entry(struct __bus_entry *bus);
66
void ct_io_apic_entry(struct __io_apic_entry *ioa);
67
void ct_io_intr_entry(struct __io_intr_entry *iointr);
68
void ct_l_intr_entry(struct __l_intr_entry *lintr);
69
 
70
void ct_extended_entries(void);
71
 
72
static struct __mpfs *fs;
73
static struct __mpct *ct;
74
 
75
struct __processor_entry *processor_entries = NULL;
76
struct __bus_entry *bus_entries = NULL;
77
struct __io_apic_entry *io_apic_entries = NULL;
78
struct __io_intr_entry *io_intr_entries = NULL;
79
struct __l_intr_entry *l_intr_entries = NULL;
80
 
81
int processor_entry_cnt = 0;
82
int bus_entry_cnt = 0;
83
int io_apic_entry_cnt = 0;
84
int io_intr_entry_cnt = 0;
85
int l_intr_entry_cnt = 0;
86
 
87
waitq_t ap_completion_wq;
88
waitq_t kmp_completion_wq;
89
 
90
/*
91
 * Used to check the integrity of the MP Floating Structure.
92
 */
93
int mp_fs_check(__u8 *base)
94
{
95
	int i;
96
	__u8 sum;
97
 
98
	for (i = 0, sum = 0; i < 16; i++)
99
		sum += base[i];
100
 
101
	return !sum;
102
}
103
 
104
/*
105
 * Used to check the integrity of the MP Configuration Table.
106
 */
107
int mp_ct_check(void)
108
{
109
	__u8 *base = (__u8 *) ct;
110
	__u8 *ext = base + ct->base_table_length;
111
	__u8 sum;
112
	int i;	
113
 
114
	/* count the checksum for the base table */
115
	for (i=0,sum=0; i < ct->base_table_length; i++)
116
		sum += base[i];
117
 
118
	if (sum)
119
		return 0;
120
 
121
	/* count the checksum for the extended table */
122
	for (i=0,sum=0; i < ct->ext_table_length; i++)
123
		sum += ext[i];
124
 
12 jermar 125
	return sum == ct->ext_table_checksum;
1 jermar 126
}
127
 
128
void mp_init(void)
129
{
130
	__address addr, frame;
131
	int cnt, n;
132
 
133
 
134
	/*
135
	 * First place to search the MP Floating Pointer Structure is the Extended
136
	 * BIOS Data Area. We have to read EBDA segment address from the BIOS Data
137
	 * Area. Unfortunatelly, this memory is in page 0, which has intentionally no
138
	 * mapping.
139
	 */
140
	frame = frame_alloc(FRAME_KA);
141
	map_page_to_frame(frame,0,PAGE_CACHEABLE,0);
142
	addr = *((__u16 *) (frame + 0x40e)) * 16;
143
	map_page_to_frame(frame,frame,PAGE_CACHEABLE,0);
144
	frame_free(frame);	
145
 
146
	/*
147
	 * EBDA can be undefined. In that case addr would be 0. 
148
	 */
149
	if (addr >= 0x1000) {
150
		cnt = 1024;
151
		while (addr = __u32_search(addr,cnt,FS_SIGNATURE)) {
152
			if (mp_fs_check((__u8 *) addr))
153
				goto fs_found;
154
			addr++;
155
			cnt--;
156
		}
157
	}
158
 
159
	/*
160
	 * Second place where the MP Floating Pointer Structure may live is the last
161
	 * kilobyte of base memory.
162
	 */
163
	addr = 639*1024;
164
	cnt = 1024;
165
	while (addr = __u32_search(addr,cnt,FS_SIGNATURE)) {
166
		if (mp_fs_check((__u8 *) addr))
167
			goto fs_found;
168
		addr++;
169
		cnt--;
170
	}
171
 
172
	/*
173
	 * As the last resort, MP Floating Pointer Structure is searched in the BIOS
174
	 * ROM.
175
	 */
176
	addr = 0xf0000;
177
	cnt = 64*1024;
178
	while (addr = __u32_search(addr,cnt,FS_SIGNATURE)) {
179
		if (mp_fs_check((__u8 *) addr))
180
			goto fs_found;
181
		addr++;
182
		cnt--;
183
	}
184
 
185
	return;
186
 
187
fs_found:
188
	printf("%L: MP Floating Pointer Structure\n", addr);
189
 
190
	fs = (struct __mpfs *) addr;
191
	frame_not_free((__address) fs);
192
 
193
	if (fs->config_type == 0 && fs->configuration_table) {
194
		if (fs->mpfib2 >> 7) {
195
			printf("mp_init: PIC mode not supported\n");
196
			return;
197
		}
198
 
199
		ct = fs->configuration_table;
200
		frame_not_free((__address) ct);
201
		config.cpu_count = configure_via_ct();
202
	} 
203
	else
204
		config.cpu_count = configure_via_default(fs->config_type);
205
 
206
	if (config.cpu_count > 1) {
207
		map_page_to_frame((__address) l_apic, (__address) l_apic, PAGE_NOT_CACHEABLE, 0);
208
 	}		
209
 
210
 
211
	/*
212
	 * Must be initialized outside the kmp thread, since it is waited
213
	 * on before the kmp thread is created.
214
	 */
215
	waitq_initialize(&kmp_completion_wq);
216
	return;
217
}
218
 
219
int configure_via_ct(void)
220
{
221
	__u8 *cur;
222
	int i, cnt;
223
 
224
	if (ct->signature != CT_SIGNATURE) {
225
		printf("configure_via_ct: bad ct->signature\n");
226
		return 1;
227
	}
228
	if (!mp_ct_check()) {
229
		printf("configure_via_ct: bad ct checksum\n");
230
		return 1;
231
	}
232
	if (ct->oem_table) {
233
		printf("configure_via_ct: ct->oem_table not supported\n");
234
		return 1;
235
	}
236
 
237
	l_apic = ct->l_apic;
238
 
239
	cnt = 0;
240
	cur = &ct->base_table[0];
241
	for (i=0; i < ct->entry_count; i++) {
242
		switch (*cur) {
243
			/* Processor entry */
244
			case 0:	
245
				processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
246
				processor_entry_cnt++;
247
				cnt += ct_processor_entry((struct __processor_entry *) cur);
248
				cur += 20;
249
				break;
250
 
251
			/* Bus entry */
252
			case 1:
253
				bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
254
				bus_entry_cnt++;
255
				ct_bus_entry((struct __bus_entry *) cur);
256
				cur += 8;
257
				break;
258
 
259
			/* I/O Apic */
260
			case 2:
261
				io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
262
				io_apic_entry_cnt++;
263
				ct_io_apic_entry((struct __io_apic_entry *) cur);
264
				cur += 8;
265
				break;
266
 
267
			/* I/O Interrupt Assignment */
268
			case 3:
269
				io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
270
				io_intr_entry_cnt++;
271
				ct_io_intr_entry((struct __io_intr_entry *) cur);
272
				cur += 8;
273
				break;
274
 
275
			/* Local Interrupt Assignment */
276
			case 4:
277
				l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
278
				l_intr_entry_cnt++;
279
				ct_l_intr_entry((struct __l_intr_entry *) cur);
280
		    		cur += 8;
281
				break;
282
 
283
			default:
284
				/*
285
				 * Something is wrong. Fallback to UP mode.
286
				 */
287
 
288
				printf("configure_via_ct: ct badness\n");
289
				return 1;
290
		}
291
	}
292
 
293
	/*
294
	 * Process extended entries.
295
	 */
296
	ct_extended_entries();
297
	return cnt;
298
}
299
 
300
int configure_via_default(__u8 n)
301
{
302
	/*
303
	 * Not yet implemented.
304
	 */
305
	printf("configure_via_default: not supported\n");
306
	return 1;
307
}
308
 
309
 
310
int ct_processor_entry(struct __processor_entry *pr)
311
{
312
	/*
313
	 * Ignore processors which are not marked enabled.
314
	 */
315
	if ((pr->cpu_flags & (1<<0)) == 0)
316
		return 0;
317
 
318
	apic_id_mask |= (1<<pr->l_apic_id); 
319
	return 1;
320
}
321
 
322
void ct_bus_entry(struct __bus_entry *bus)
323
{
324
#ifdef MPCT_VERBOSE
325
	char buf[7];
326
	memcopy((__address) bus->bus_type, (__address) buf,6);
327
	buf[6] = 0;
328
	printf("bus%d: %s\n", bus->bus_id, buf);
329
#endif
330
}
331
 
332
void ct_io_apic_entry(struct __io_apic_entry *ioa)
333
{
334
	static int io_apic_count = 0;
335
 
336
	/* this ioapic is marked unusable */
337
	if (ioa->io_apic_flags & 1 == 0)
338
		return;
339
 
340
	if (io_apic_count++ > 0) {
341
		/*
342
		 * Multiple IO APIC's are currently not supported.
343
		 */
344
		return;
345
	}
346
 
347
	map_page_to_frame((__address) ioa->io_apic, (__address) ioa->io_apic, PAGE_NOT_CACHEABLE, 0);
348
 
349
	io_apic = ioa->io_apic;
350
}
351
 
352
//#define MPCT_VERBOSE
353
void ct_io_intr_entry(struct __io_intr_entry *iointr)
354
{
355
#ifdef MPCT_VERBOSE
356
	switch (iointr->intr_type) {
357
	    case 0: printf("INT"); break;
358
	    case 1: printf("NMI"); break;
359
	    case 2: printf("SMI"); break;
360
	    case 3: printf("ExtINT"); break;
361
	}
362
	putchar(',');
363
	switch (iointr->poel&3) {
364
	    case 0: printf("bus-like"); break;
365
	    case 1: printf("active high"); break;
366
	    case 2: printf("reserved"); break;
367
	    case 3: printf("active low"); break;
368
	}
369
	putchar(',');
370
	switch ((iointr->poel>>2)&3) {
371
	    case 0: printf("bus-like"); break;
372
	    case 1: printf("edge-triggered"); break;
373
	    case 2: printf("reserved"); break;
374
	    case 3: printf("level-triggered"); break;
375
	}
376
	putchar(',');
377
	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
378
	putchar(',');
379
	printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
380
	putchar('\n');	
381
#endif
382
}
383
 
384
void ct_l_intr_entry(struct __l_intr_entry *lintr)
385
{
386
#ifdef MPCT_VERBOSE
387
	switch (lintr->intr_type) {
388
	    case 0: printf("INT"); break;
389
	    case 1: printf("NMI"); break;
390
	    case 2: printf("SMI"); break;
391
	    case 3: printf("ExtINT"); break;
392
	}
393
	putchar(',');
394
	switch (lintr->poel&3) {
395
	    case 0: printf("bus-like"); break;
396
	    case 1: printf("active high"); break;
397
	    case 2: printf("reserved"); break;
398
	    case 3: printf("active low"); break;
399
	}
400
	putchar(',');
401
	switch ((lintr->poel>>2)&3) {
402
	    case 0: printf("bus-like"); break;
403
	    case 1: printf("edge-triggered"); break;
404
	    case 2: printf("reserved"); break;
405
	    case 3: printf("level-triggered"); break;
406
	}
407
	putchar(',');
408
	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
409
	putchar(',');
410
	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
411
	putchar('\n');
412
#endif
413
}
414
 
415
void ct_extended_entries(void)
416
{
13 jermar 417
	__u8 *ext = (__u8 *) ct + ct->base_table_length;
418
	__u8 *cur;
419
 
420
	for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
421
		switch (cur[CT_EXT_ENTRY_TYPE]) {
422
			default:
423
				printf("%X: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
424
				break;
425
		}
426
	}
1 jermar 427
}
428
 
429
/*
430
 * Kernel thread for bringing up application processors. It becomes clear
431
 * that we need an arrangement like this (AP's being initialized by a kernel
432
 * thread), for a thread has its dedicated stack. (The stack used during the
433
 * BSP initialization (prior the very first call to scheduler()) will be used
434
 * as an initialization stack for each AP.)
435
 */
436
void kmp(void *arg)
437
{
438
	struct __processor_entry *pr;
439
	__address src, dst;
440
	__address frame;
441
	int i;
442
 
443
	waitq_initialize(&ap_completion_wq);
444
 
445
	/*
446
	 * Processor entries immediately follow the configuration table header.
447
	 */
448
	pr = processor_entries;
449
 
450
	/*
451
	 * Grab a frame and map its address to page 0. This is a hack which
452
	 * accesses data in frame 0. Note that page 0 is not present because
453
	 * of nil reference bug catching.
454
	 */
455
	frame = frame_alloc(FRAME_KA);
456
	map_page_to_frame(frame,0,PAGE_CACHEABLE,0);
457
 
458
	/*
459
	 * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
460
	 */
461
	*((__u16 *) (frame + 0x467+0)) =  ((__address) ap_boot) >> 4;	/* segment */
462
	*((__u16 *) (frame + 0x467+2)) =  0x0;	/* offset */
463
 
464
	/*
465
	 * Give back the borrowed frame and restore identity mapping for it.
466
	 */
467
	map_page_to_frame(frame,frame,PAGE_CACHEABLE,0);
468
	frame_free(frame);
469
 
470
	/*
471
	 * Save 0xa to address 0xf of the CMOS RAM.
472
	 * BIOS will not do the POST after the INIT signal.
473
	 */
474
	outb(0x70,0xf);
475
	outb(0x71,0xa);
476
 
477
	cpu_priority_high();
478
 
479
	pic_disable_irqs(0xffff);
480
	apic_init();
481
 
482
	for (i = 0; i < processor_entry_cnt; i++) {
483
		struct descriptor *gdt_new;
484
 
485
		/*
486
		 * Skip processors marked unusable.
487
		 */
488
		if (pr[i].cpu_flags & (1<<0) == 0)
489
			continue;
27 jermar 490
 
1 jermar 491
		/*
492
		 * The bootstrap processor is already up.
493
		 */
494
		if (pr[i].cpu_flags & (1<<1))
495
			continue;
27 jermar 496
 
497
		if (pr[i].l_apic_id == l_apic_id()) {
28 jermar 498
			printf("%L: bad processor entry #%d, will not send IPI to myself\n", &pr[i], i);
27 jermar 499
			continue;
500
		}
1 jermar 501
 
502
		/*
503
		 * Prepare new GDT for CPU in question.
504
		 */
505
		if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor))))
506
			panic(PANIC "couldn't allocate memory for GDT\n");
507
 
508
		memcopy(gdt, gdt_new, GDT_ITEMS*sizeof(struct descriptor));
509
		gdtr.base = (__address) gdt_new;
27 jermar 510
 
1 jermar 511
		if (l_apic_send_init_ipi(pr[i].l_apic_id)) {
512
			/*
513
		         * There may be just one AP being initialized at
514
			 * the time. After it comes completely up, it is
515
			 * supposed to wake us up.
516
		         */
517
			waitq_sleep(&ap_completion_wq);
518
			cpu_priority_high();
519
		}
520
		else {
521
			printf("INIT IPI for l_apic%d failed\n", pr[i].l_apic_id);
522
		}
523
	}
524
 
525
	/*
526
	 * Wakeup the kinit thread so that
527
	 * system initialization can go on.
528
	 */
529
	waitq_wakeup(&kmp_completion_wq, WAKEUP_FIRST);
530
}
531
 
532
int mp_irq_to_pin(int irq)
533
{
534
	int i;
535
 
536
	for(i=0;i<io_intr_entry_cnt;i++) {
537
		if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
538
			return io_intr_entries[i].dst_io_apic_pin;
539
	}
540
 
541
	return -1;
542
}
543
 
544
#endif /* __SMP__ */