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1 | jermar | 1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
1702 | cejka | 29 | /** @addtogroup ia32 |
30 | * @{ |
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31 | */ |
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32 | /** @file |
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33 | */ |
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34 | |||
11 | jermar | 35 | #ifndef __ia32_ATOMIC_H__ |
36 | #define __ia32_ATOMIC_H__ |
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1 | jermar | 37 | |
38 | #include <arch/types.h> |
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1100 | palkovsky | 39 | #include <arch/barrier.h> |
40 | #include <preemption.h> |
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1104 | jermar | 41 | #include <typedefs.h> |
1 | jermar | 42 | |
475 | jermar | 43 | static inline void atomic_inc(atomic_t *val) { |
458 | decky | 44 | #ifdef CONFIG_SMP |
625 | palkovsky | 45 | __asm__ volatile ("lock incl %0\n" : "=m" (val->count)); |
115 | jermar | 46 | #else |
625 | palkovsky | 47 | __asm__ volatile ("incl %0\n" : "=m" (val->count)); |
458 | decky | 48 | #endif /* CONFIG_SMP */ |
115 | jermar | 49 | } |
1 | jermar | 50 | |
475 | jermar | 51 | static inline void atomic_dec(atomic_t *val) { |
458 | decky | 52 | #ifdef CONFIG_SMP |
625 | palkovsky | 53 | __asm__ volatile ("lock decl %0\n" : "=m" (val->count)); |
115 | jermar | 54 | #else |
625 | palkovsky | 55 | __asm__ volatile ("decl %0\n" : "=m" (val->count)); |
458 | decky | 56 | #endif /* CONFIG_SMP */ |
115 | jermar | 57 | } |
58 | |||
1104 | jermar | 59 | static inline long atomic_postinc(atomic_t *val) |
477 | vana | 60 | { |
1691 | palkovsky | 61 | long r = 1; |
627 | jermar | 62 | |
477 | vana | 63 | __asm__ volatile ( |
1691 | palkovsky | 64 | "lock xaddl %1, %0\n" |
1697 | palkovsky | 65 | : "=m" (val->count), "+r" (r) |
477 | vana | 66 | ); |
627 | jermar | 67 | |
477 | vana | 68 | return r; |
69 | } |
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70 | |||
1104 | jermar | 71 | static inline long atomic_postdec(atomic_t *val) |
477 | vana | 72 | { |
1691 | palkovsky | 73 | long r = -1; |
627 | jermar | 74 | |
477 | vana | 75 | __asm__ volatile ( |
1691 | palkovsky | 76 | "lock xaddl %1, %0\n" |
1697 | palkovsky | 77 | : "=m" (val->count), "+r"(r) |
477 | vana | 78 | ); |
627 | jermar | 79 | |
477 | vana | 80 | return r; |
81 | } |
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82 | |||
1024 | jermar | 83 | #define atomic_preinc(val) (atomic_postinc(val)+1) |
84 | #define atomic_predec(val) (atomic_postdec(val)-1) |
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477 | vana | 85 | |
633 | palkovsky | 86 | static inline __u32 test_and_set(atomic_t *val) { |
87 | __u32 v; |
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115 | jermar | 88 | |
89 | __asm__ volatile ( |
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90 | "movl $1, %0\n" |
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259 | palkovsky | 91 | "xchgl %0, %1\n" |
625 | palkovsky | 92 | : "=r" (v),"=m" (val->count) |
115 | jermar | 93 | ); |
94 | |||
95 | return v; |
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96 | } |
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97 | |||
1104 | jermar | 98 | /** ia32 specific fast spinlock */ |
1100 | palkovsky | 99 | static inline void atomic_lock_arch(atomic_t *val) |
100 | { |
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101 | __u32 tmp; |
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115 | jermar | 102 | |
1100 | palkovsky | 103 | preemption_disable(); |
104 | __asm__ volatile ( |
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105 | "0:;" |
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106 | #ifdef CONFIG_HT |
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107 | "pause;" /* Pentium 4's HT love this instruction */ |
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108 | #endif |
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109 | "mov %0, %1;" |
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110 | "testl %1, %1;" |
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1104 | jermar | 111 | "jnz 0b;" /* Lightweight looping on locked spinlock */ |
1100 | palkovsky | 112 | |
113 | "incl %1;" /* now use the atomic operation */ |
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114 | "xchgl %0, %1;" |
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115 | "testl %1, %1;" |
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116 | "jnz 0b;" |
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117 | : "=m"(val->count),"=r"(tmp) |
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118 | ); |
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119 | /* |
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120 | * Prevent critical section code from bleeding out this way up. |
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121 | */ |
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122 | CS_ENTER_BARRIER(); |
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123 | } |
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1 | jermar | 124 | |
125 | #endif |
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1702 | cejka | 126 | |
127 | /** @} |
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128 | */ |
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129 |