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224 | palkovsky | 1 | # |
2 | # Copyright (C) 2005 Ondrej Palkovsky |
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3 | # All rights reserved. |
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4 | # |
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5 | # Redistribution and use in source and binary forms, with or without |
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6 | # modification, are permitted provided that the following conditions |
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7 | # are met: |
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8 | # |
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9 | # - Redistributions of source code must retain the above copyright |
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10 | # notice, this list of conditions and the following disclaimer. |
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11 | # - Redistributions in binary form must reproduce the above copyright |
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12 | # notice, this list of conditions and the following disclaimer in the |
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13 | # documentation and/or other materials provided with the distribution. |
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14 | # - The name of the author may not be used to endorse or promote products |
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15 | # derived from this software without specific prior written permission. |
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16 | # |
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17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | # |
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28 | |||
29 | |||
30 | # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word |
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31 | # and 1 means interrupt with error word |
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32 | |||
33 | |||
34 | #define ERROR_WORD_INTERRUPT_LIST 0x00027D00 |
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35 | |||
36 | #define __ASM__ |
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37 | #include <arch/pm.h> |
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38 | |||
39 | .text |
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40 | .global interrupt_handlers |
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41 | .global panic_printf |
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42 | |||
43 | panic_printf: |
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44 | movq $halt, (%rsp) |
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45 | jmp printf |
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46 | |||
252 | palkovsky | 47 | .global memcpy |
48 | memcpy: |
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49 | jmp _memcpy |
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50 | |||
51 | .global cpuid |
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242 | palkovsky | 52 | .global has_cpuid |
53 | .global rdtsc |
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251 | palkovsky | 54 | .global read_efer_flag |
55 | .global set_efer_flag |
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56 | |||
252 | palkovsky | 57 | |
242 | palkovsky | 58 | ## Determine CPUID support |
59 | # |
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60 | # Return 0 in EAX if CPUID is not support, 1 if supported. |
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61 | # |
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62 | has_cpuid: |
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63 | pushq %rbx |
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64 | |||
65 | pushfq # store flags |
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66 | popq %rax # read flags |
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67 | movq %rax,%rbx # copy flags |
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68 | btcl $21,%ebx # swap the ID bit |
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69 | pushq %rbx |
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70 | popfq # propagate the change into flags |
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71 | pushfq |
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72 | popq %rbx # read flags |
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73 | andl $(1<<21),%eax # interested only in ID bit |
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74 | andl $(1<<21),%ebx |
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75 | xorl %ebx,%eax # 0 if not supported, 1 if supported |
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76 | |||
77 | popq %rbx |
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78 | ret |
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79 | |||
251 | palkovsky | 80 | cpuid: |
81 | movq %rbx, %r10 # we have to preserve rbx across function calls |
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242 | palkovsky | 82 | |
251 | palkovsky | 83 | movl %edi,%eax # load the command into %eax |
84 | |||
85 | cpuid |
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86 | movl %eax,0(%rsi) |
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87 | movl %ebx,4(%rsi) |
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88 | movl %ecx,8(%rsi) |
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89 | movl %edx,12(%rsi) |
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90 | |||
91 | movq %r10, %rbx |
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92 | ret |
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93 | |||
242 | palkovsky | 94 | rdtsc: |
95 | xorq %rax,%rax |
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96 | rdtsc |
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97 | ret |
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251 | palkovsky | 98 | |
99 | set_efer_flag: |
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100 | movq $0xc0000080, %rcx |
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101 | rdmsr |
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102 | btsl %edi, %eax |
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103 | wrmsr |
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104 | ret |
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242 | palkovsky | 105 | |
251 | palkovsky | 106 | read_efer_flag: |
107 | movq $0xc0000080, %rcx |
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108 | rdmsr |
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109 | ret |
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242 | palkovsky | 110 | |
224 | palkovsky | 111 | # Push all general purpose registers on stack except %rbp, %rsp |
112 | .macro push_all_gpr |
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113 | pushq %rax |
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114 | pushq %rbx |
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115 | pushq %rcx |
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116 | pushq %rdx |
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117 | pushq %rsi |
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118 | pushq %rdi |
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119 | pushq %r8 |
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120 | pushq %r9 |
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121 | pushq %r10 |
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122 | pushq %r11 |
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123 | pushq %r12 |
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124 | pushq %r13 |
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125 | pushq %r14 |
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126 | pushq %r15 |
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127 | .endm |
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128 | |||
129 | .macro pop_all_gpr |
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130 | popq %r15 |
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131 | popq %r14 |
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132 | popq %r13 |
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133 | popq %r12 |
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134 | popq %r11 |
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135 | popq %r10 |
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136 | popq %r9 |
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137 | popq %r8 |
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138 | popq %rdi |
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139 | popq %rsi |
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140 | popq %rdx |
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141 | popq %rcx |
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142 | popq %rbx |
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143 | popq %rax |
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144 | .endm |
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145 | |||
146 | ## Declare interrupt handlers |
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147 | # |
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148 | # Declare interrupt handlers for n interrupt |
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149 | # vectors starting at vector i. |
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150 | # |
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151 | # The handlers setup data segment registers |
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152 | # and call trap_dispatcher(). |
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153 | # |
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154 | .macro handler i n |
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155 | pushq %rbp |
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156 | movq %rsp,%rbp |
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157 | |||
158 | push_all_gpr |
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159 | |||
160 | # trap_dispatcher(i, stack) |
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161 | movq $(\i),%rdi # %rdi - first parameter |
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162 | movq %rbp, %rsi |
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163 | addq $8, %rsi # %rsi - second parameter - original stack |
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164 | call trap_dispatcher |
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165 | |||
166 | # Test if this is interrupt with error word or not |
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167 | mov $\i,%cl; |
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168 | movl $1,%eax; |
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169 | test $0xe0,%cl; |
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170 | jnz 0f; |
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171 | and $0x1f,%cl; |
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172 | shl %cl,%eax; |
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173 | and $ERROR_WORD_INTERRUPT_LIST,%eax; |
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174 | jz 0f; |
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175 | |||
176 | |||
177 | # Return with error word |
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178 | pop_all_gpr |
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179 | |||
180 | popq %rbp; |
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181 | add $8,%esp; # Skip error word |
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182 | iretq |
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183 | |||
184 | 0: |
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185 | # Return with no error word |
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186 | pop_all_gpr |
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187 | |||
188 | popq %rbp |
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189 | iretq |
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190 | |||
191 | .if (\n-\i)-1 |
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192 | handler "(\i+1)",\n |
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193 | .endif |
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194 | .endm |
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195 | |||
196 | interrupt_handlers: |
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197 | h_start: |
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198 | handler 0 IDT_ITEMS |
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199 | # handler 64 128 |
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200 | # handler 128 192 |
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201 | # handler 192 256 |
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202 | h_end: |
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203 | |||
204 | |||
205 | .data |
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206 | .global interrupt_handler_size |
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207 | |||
208 | interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS |