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206 | palkovsky | 1 | /* |
2 | * Copyright (C) 2005 Ondrej Palkovsky |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
1704 | cejka | 29 | /** @addtogroup amd64 amd64 |
1702 | cejka | 30 | * @ingroup others |
31 | * @{ |
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32 | */ |
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33 | /** @file |
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34 | */ |
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35 | |||
206 | palkovsky | 36 | #include <arch.h> |
37 | |||
38 | #include <arch/types.h> |
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39 | |||
40 | #include <config.h> |
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41 | |||
1112 | palkovsky | 42 | #include <proc/thread.h> |
1473 | decky | 43 | #include <arch/drivers/ega.h> |
1477 | decky | 44 | #include <arch/drivers/vesa.h> |
894 | jermar | 45 | #include <genarch/i8042/i8042.h> |
1477 | decky | 46 | #include <arch/drivers/i8254.h> |
47 | #include <arch/drivers/i8259.h> |
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206 | palkovsky | 48 | |
49 | #include <arch/bios/bios.h> |
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242 | palkovsky | 50 | #include <arch/mm/memory_init.h> |
251 | palkovsky | 51 | #include <arch/cpu.h> |
52 | #include <print.h> |
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53 | #include <arch/cpuid.h> |
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452 | decky | 54 | #include <genarch/acpi/acpi.h> |
282 | palkovsky | 55 | #include <panic.h> |
576 | palkovsky | 56 | #include <interrupt.h> |
803 | palkovsky | 57 | #include <arch/syscall.h> |
1072 | palkovsky | 58 | #include <arch/debugger.h> |
1112 | palkovsky | 59 | #include <syscall/syscall.h> |
1474 | palkovsky | 60 | #include <console/console.h> |
206 | palkovsky | 61 | |
1112 | palkovsky | 62 | |
799 | palkovsky | 63 | /** Disable I/O on non-privileged levels |
64 | * |
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65 | * Clean IOPL(12,13) and NT(14) flags in EFLAGS register |
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66 | */ |
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67 | static void clean_IOPL_NT_flags(void) |
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68 | { |
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69 | asm |
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70 | ( |
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71 | "pushfq;" |
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72 | "pop %%rax;" |
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73 | "and $~(0x7000),%%rax;" |
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74 | "pushq %%rax;" |
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75 | "popfq;" |
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76 | : |
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77 | : |
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78 | :"%rax" |
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79 | ); |
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80 | } |
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81 | |||
82 | /** Disable alignment check |
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83 | * |
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84 | * Clean AM(18) flag in CR0 register |
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85 | */ |
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86 | static void clean_AM_flag(void) |
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87 | { |
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88 | asm |
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89 | ( |
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90 | "mov %%cr0,%%rax;" |
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91 | "and $~(0x40000),%%rax;" |
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92 | "mov %%rax,%%cr0;" |
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93 | : |
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94 | : |
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95 | :"%rax" |
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96 | ); |
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97 | } |
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98 | |||
206 | palkovsky | 99 | void arch_pre_mm_init(void) |
100 | { |
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251 | palkovsky | 101 | struct cpu_info cpuid_s; |
102 | |||
103 | cpuid(AMD_CPUID_EXTENDED,&cpuid_s); |
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282 | palkovsky | 104 | if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE))) |
105 | panic("Processor does not support No-execute pages.\n"); |
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106 | |||
107 | cpuid(INTEL_CPUID_STANDARD,&cpuid_s); |
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108 | if (! (cpuid_s.cpuid_edx & (1<<INTEL_FXSAVE))) |
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109 | panic("Processor does not support FXSAVE/FXRESTORE.\n"); |
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110 | |||
111 | if (! (cpuid_s.cpuid_edx & (1<<INTEL_SSE2))) |
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112 | panic("Processor does not support SSE2 instructions.\n"); |
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113 | |||
114 | /* Enable No-execute pages */ |
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251 | palkovsky | 115 | set_efer_flag(AMD_NXE_FLAG); |
282 | palkovsky | 116 | /* Enable FPU */ |
117 | cpu_setup_fpu(); |
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803 | palkovsky | 118 | |
799 | palkovsky | 119 | /* Initialize segmentation */ |
206 | palkovsky | 120 | pm_init(); |
121 | |||
799 | palkovsky | 122 | /* Disable I/O on nonprivileged levels |
123 | * clear the NT(nested-thread) flag |
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124 | */ |
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125 | clean_IOPL_NT_flags(); |
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126 | /* Disable alignment check */ |
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127 | clean_AM_flag(); |
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128 | |||
206 | palkovsky | 129 | if (config.cpu_active == 1) { |
130 | bios_init(); |
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131 | i8259_init(); /* PIC */ |
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132 | i8254_init(); /* hard clock */ |
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133 | |||
458 | decky | 134 | #ifdef CONFIG_SMP |
576 | palkovsky | 135 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", |
136 | tlb_shootdown_ipi); |
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458 | decky | 137 | #endif /* CONFIG_SMP */ |
206 | palkovsky | 138 | } |
139 | } |
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140 | |||
141 | void arch_post_mm_init(void) |
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142 | { |
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143 | if (config.cpu_active == 1) { |
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1289 | vana | 144 | #ifdef CONFIG_FB |
1303 | palkovsky | 145 | if (vesa_present()) |
146 | vesa_init(); |
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147 | else |
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1289 | vana | 148 | #endif |
1303 | palkovsky | 149 | ega_init(); /* video */ |
1072 | palkovsky | 150 | /* Enable debugger */ |
151 | debugger_init(); |
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1303 | palkovsky | 152 | /* Merge all memory zones to 1 big zone */ |
153 | zone_merge_all(); |
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206 | palkovsky | 154 | } |
803 | palkovsky | 155 | /* Setup fast SYSCALL/SYSRET */ |
156 | syscall_setup_cpu(); |
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1072 | palkovsky | 157 | |
206 | palkovsky | 158 | } |
242 | palkovsky | 159 | |
503 | jermar | 160 | void arch_pre_smp_init(void) |
242 | palkovsky | 161 | { |
162 | if (config.cpu_active == 1) { |
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163 | memory_print_map(); |
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164 | |||
458 | decky | 165 | #ifdef CONFIG_SMP |
242 | palkovsky | 166 | acpi_init(); |
458 | decky | 167 | #endif /* CONFIG_SMP */ |
242 | palkovsky | 168 | } |
169 | } |
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170 | |||
503 | jermar | 171 | void arch_post_smp_init(void) |
172 | { |
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894 | jermar | 173 | i8042_init(); /* keyboard controller */ |
503 | jermar | 174 | } |
175 | |||
242 | palkovsky | 176 | void calibrate_delay_loop(void) |
177 | { |
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178 | i8254_calibrate_delay_loop(); |
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179 | i8254_normal_operation(); |
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180 | } |
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1112 | palkovsky | 181 | |
1121 | jermar | 182 | /** Set thread-local-storage pointer |
1112 | palkovsky | 183 | * |
184 | * TLS pointer is set in FS register. Unfortunately the 64-bit |
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185 | * part can be set only in CPL0 mode. |
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186 | * |
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1121 | jermar | 187 | * The specs say, that on %fs:0 there is stored contents of %fs register, |
1112 | palkovsky | 188 | * we need not to go to CPL0 to read it. |
189 | */ |
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190 | __native sys_tls_set(__native addr) |
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191 | { |
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1184 | jermar | 192 | THREAD->arch.tls = addr; |
1112 | palkovsky | 193 | write_msr(AMD_MSR_FS, addr); |
194 | return 0; |
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195 | } |
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1474 | palkovsky | 196 | |
197 | /** Acquire console back for kernel |
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198 | * |
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199 | */ |
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200 | void arch_grab_console(void) |
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201 | { |
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202 | i8042_grab(); |
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203 | } |
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204 | /** Return console to userspace |
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205 | * |
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206 | */ |
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207 | void arch_release_console(void) |
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208 | { |
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209 | i8042_release(); |
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210 | } |
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1702 | cejka | 211 | |
212 | /** @} |
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213 | */ |
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214 |