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| Rev | Author | Line No. | Line |
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| 633 | palkovsky | 1 | /* |
| 2 | * Copyright (C) 2001-2004 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | #ifndef __amd64_ATOMIC_H__ |
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| 30 | #define __amd64_ATOMIC_H__ |
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| 31 | |||
| 32 | #include <arch/types.h> |
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| 33 | |||
| 34 | typedef struct { volatile __u64 count; } atomic_t; |
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| 35 | |||
| 36 | static inline void atomic_set(atomic_t *val, __u64 i) |
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| 37 | { |
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| 38 | val->count = i; |
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| 39 | } |
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| 40 | |||
| 41 | static inline __u64 atomic_get(atomic_t *val) |
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| 42 | { |
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| 43 | return val->count; |
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| 44 | } |
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| 45 | |||
| 46 | static inline void atomic_inc(atomic_t *val) { |
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| 47 | #ifdef CONFIG_SMP |
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| 48 | __asm__ volatile ("lock incq %0\n" : "=m" (val->count)); |
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| 49 | #else |
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| 50 | __asm__ volatile ("incq %0\n" : "=m" (val->count)); |
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| 51 | #endif /* CONFIG_SMP */ |
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| 52 | } |
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| 53 | |||
| 54 | static inline void atomic_dec(atomic_t *val) { |
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| 55 | #ifdef CONFIG_SMP |
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| 56 | __asm__ volatile ("lock decq %0\n" : "=m" (val->count)); |
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| 57 | #else |
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| 58 | __asm__ volatile ("decq %0\n" : "=m" (val->count)); |
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| 59 | #endif /* CONFIG_SMP */ |
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| 60 | } |
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| 61 | |||
| 62 | static inline count_t atomic_inc_pre(atomic_t *val) |
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| 63 | { |
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| 64 | count_t r; |
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| 65 | |||
| 66 | __asm__ volatile ( |
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| 67 | "movq $1, %0\n" |
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| 68 | "lock xaddq %0, %1\n" |
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| 69 | : "=r" (r), "=m" (val->count) |
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| 70 | ); |
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| 71 | |||
| 72 | return r; |
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| 73 | } |
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| 74 | |||
| 75 | static inline count_t atomic_dec_pre(atomic_t *val) |
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| 76 | { |
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| 77 | count_t r; |
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| 78 | |||
| 79 | __asm__ volatile ( |
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| 80 | "movq $-1, %0\n" |
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| 81 | "lock xaddq %0, %1\n" |
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| 82 | : "=r" (r), "=m" (val->count) |
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| 83 | ); |
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| 84 | |||
| 85 | return r; |
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| 86 | } |
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| 87 | |||
| 88 | #define atomic_inc_post(val) (atomic_inc_pre(val)+1) |
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| 89 | #define atomic_dec_post(val) (atomic_dec_pre(val)-1) |
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| 90 | |||
| 91 | static inline __u64 test_and_set(atomic_t *val) { |
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| 92 | __u64 v; |
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| 93 | |||
| 94 | __asm__ volatile ( |
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| 95 | "movq $1, %0\n" |
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| 96 | "xchgq %0, %1\n" |
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| 97 | : "=r" (v),"=m" (val->count) |
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| 98 | ); |
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| 99 | |||
| 100 | return v; |
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| 101 | } |
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| 102 | |||
| 103 | |||
| 104 | extern void spinlock_arch(volatile int *val); |
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| 105 | |||
| 106 | #endif |