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633 | palkovsky | 1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
29 | #ifndef __amd64_ATOMIC_H__ |
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30 | #define __amd64_ATOMIC_H__ |
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31 | |||
32 | #include <arch/types.h> |
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1100 | palkovsky | 33 | #include <arch/barrier.h> |
34 | #include <preemption.h> |
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1104 | jermar | 35 | #include <typedefs.h> |
633 | palkovsky | 36 | |
37 | static inline void atomic_inc(atomic_t *val) { |
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38 | #ifdef CONFIG_SMP |
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39 | __asm__ volatile ("lock incq %0\n" : "=m" (val->count)); |
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40 | #else |
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41 | __asm__ volatile ("incq %0\n" : "=m" (val->count)); |
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42 | #endif /* CONFIG_SMP */ |
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43 | } |
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44 | |||
45 | static inline void atomic_dec(atomic_t *val) { |
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46 | #ifdef CONFIG_SMP |
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47 | __asm__ volatile ("lock decq %0\n" : "=m" (val->count)); |
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48 | #else |
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49 | __asm__ volatile ("decq %0\n" : "=m" (val->count)); |
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50 | #endif /* CONFIG_SMP */ |
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51 | } |
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52 | |||
1104 | jermar | 53 | static inline long atomic_postinc(atomic_t *val) |
633 | palkovsky | 54 | { |
1104 | jermar | 55 | long r; |
633 | palkovsky | 56 | |
57 | __asm__ volatile ( |
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58 | "movq $1, %0\n" |
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59 | "lock xaddq %0, %1\n" |
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60 | : "=r" (r), "=m" (val->count) |
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61 | ); |
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62 | |||
63 | return r; |
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64 | } |
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65 | |||
1104 | jermar | 66 | static inline long atomic_postdec(atomic_t *val) |
633 | palkovsky | 67 | { |
1104 | jermar | 68 | long r; |
633 | palkovsky | 69 | |
70 | __asm__ volatile ( |
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71 | "movq $-1, %0\n" |
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72 | "lock xaddq %0, %1\n" |
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73 | : "=r" (r), "=m" (val->count) |
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74 | ); |
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75 | |||
76 | return r; |
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77 | } |
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78 | |||
1024 | jermar | 79 | #define atomic_preinc(val) (atomic_postinc(val)+1) |
80 | #define atomic_predec(val) (atomic_postdec(val)-1) |
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633 | palkovsky | 81 | |
82 | static inline __u64 test_and_set(atomic_t *val) { |
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83 | __u64 v; |
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84 | |||
85 | __asm__ volatile ( |
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86 | "movq $1, %0\n" |
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87 | "xchgq %0, %1\n" |
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88 | : "=r" (v),"=m" (val->count) |
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89 | ); |
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90 | |||
91 | return v; |
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92 | } |
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93 | |||
94 | |||
1104 | jermar | 95 | /** amd64 specific fast spinlock */ |
1100 | palkovsky | 96 | static inline void atomic_lock_arch(atomic_t *val) |
97 | { |
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98 | __u64 tmp; |
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633 | palkovsky | 99 | |
1100 | palkovsky | 100 | preemption_disable(); |
101 | __asm__ volatile ( |
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102 | "0:;" |
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103 | #ifdef CONFIG_HT |
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104 | "pause;" /* Pentium 4's HT love this instruction */ |
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633 | palkovsky | 105 | #endif |
1100 | palkovsky | 106 | "mov %0, %1;" |
107 | "testq %1, %1;" |
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1104 | jermar | 108 | "jnz 0b;" /* Lightweight looping on locked spinlock */ |
1100 | palkovsky | 109 | |
110 | "incq %1;" /* now use the atomic operation */ |
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111 | "xchgq %0, %1;" |
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112 | "testq %1, %1;" |
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113 | "jnz 0b;" |
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114 | : "=m"(val->count),"=r"(tmp) |
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115 | ); |
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116 | /* |
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117 | * Prevent critical section code from bleeding out this way up. |
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118 | */ |
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119 | CS_ENTER_BARRIER(); |
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120 | } |
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121 | |||
122 | #endif |