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570 jermar 1
/*
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 * Copyright (C) 2005 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#include <arch/mm/tlb.h>
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#include <mm/tlb.h>
619 jermar 31
#include <arch/mm/frame.h>
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#include <arch/mm/page.h>
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#include <arch/mm/mmu.h>
877 jermar 34
#include <mm/asid.h>
570 jermar 35
#include <print.h>
617 jermar 36
#include <arch/types.h>
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#include <typedefs.h>
619 jermar 38
#include <config.h>
630 jermar 39
#include <arch/trap/trap.h>
863 jermar 40
#include <panic.h>
873 jermar 41
#include <arch/asm.h>
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#include <symtab.h>
894 jermar 43
 
883 jermar 44
#include <arch/drivers/fb.h>
895 jermar 45
#include <arch/drivers/i8042.h>
570 jermar 46
 
873 jermar 47
char *context_encoding[] = {
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    "Primary",
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    "Secondary",
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    "Nucleus",
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    "Reserved"
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};
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619 jermar 54
/** Initialize ITLB and DTLB.
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 *
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 * The goal of this function is to disable MMU
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 * so that both TLBs can be purged and new
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 * kernel 4M locked entry can be installed.
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 * After TLB is initialized, MMU is enabled
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 * again.
627 jermar 61
 *
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 * Switching MMU off imposes the requirement for
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 * the kernel to run in identity mapped environment.
619 jermar 64
 */
570 jermar 65
void tlb_arch_init(void)
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{
619 jermar 67
    tlb_tag_access_reg_t tag;
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    tlb_data_t data;
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    frame_address_t fr;
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    page_address_t pg;
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    fr.address = config.base;
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    pg.address = config.base;
646 jermar 74
 
619 jermar 75
    immu_disable();
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    dmmu_disable();
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78
    /*
846 jermar 79
     * We do identity mapping of 4M-page at 4M.
619 jermar 80
     */
877 jermar 81
    tag.value = ASID_KERNEL;
619 jermar 82
    tag.vpn = pg.vpn;
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    itlb_tag_access_write(tag.value);
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    dtlb_tag_access_write(tag.value);
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87
    data.value = 0;
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    data.v = true;
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    data.size = PAGESIZE_4M;
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    data.pfn = fr.pfn;
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    data.l = true;
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    data.cp = 1;
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    data.cv = 1;
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    data.p = true;
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    data.w = true;
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    data.g = true;
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98
    itlb_data_in_write(data.value);
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    dtlb_data_in_write(data.value);
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627 jermar 101
    /*
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     * Register window traps can occur before MMU is enabled again.
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     * This ensures that any such traps will be handled from
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     * kernel identity mapped trap handler.
105
     */
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    trap_switch_trap_table();
107
 
619 jermar 108
    tlb_invalidate_all();
109
 
110
    dmmu_enable();
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    immu_enable();
873 jermar 112
 
113
    /*
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     * Quick hack: map frame buffer
115
     */
883 jermar 116
    fr.address = FB_PHYS_ADDRESS;
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    pg.address = FB_VIRT_ADDRESS;
873 jermar 118
 
877 jermar 119
    tag.value = ASID_KERNEL;
873 jermar 120
    tag.vpn = pg.vpn;
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122
    dtlb_tag_access_write(tag.value);
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124
    data.value = 0;
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    data.v = true;
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    data.size = PAGESIZE_4M;
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    data.pfn = fr.pfn;
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    data.l = true;
129
    data.cp = 0;
130
    data.cv = 0;
131
    data.p = true;
132
    data.w = true;
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    data.g = true;
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135
    dtlb_data_in_write(data.value);
894 jermar 136
 
137
    /*
138
     * Quick hack: map keyboard
139
     */
140
    fr.address = KBD_PHYS_ADDRESS;
141
    pg.address = KBD_VIRT_ADDRESS;
142
 
143
    tag.value = ASID_KERNEL;
144
    tag.vpn = pg.vpn;
145
 
146
    dtlb_tag_access_write(tag.value);
147
 
148
    data.value = 0;
149
    data.v = true;
150
    data.size = PAGESIZE_8K;
151
    data.pfn = fr.pfn;
152
    data.l = true;
153
    data.cp = 0;
154
    data.cv = 0;
155
    data.p = true;
156
    data.w = true;
157
    data.g = true;
158
 
159
    dtlb_data_in_write(data.value);
570 jermar 160
}
161
 
863 jermar 162
/** ITLB miss handler. */
163
void fast_instruction_access_mmu_miss(void)
164
{
165
    panic("%s\n", __FUNCTION__);
166
}
167
 
168
/** DTLB miss handler. */
169
void fast_data_access_mmu_miss(void)
170
{
877 jermar 171
    tlb_tag_access_reg_t tag;
172
    tlb_data_t data;
173
    __address tpc;
873 jermar 174
    char *tpc_str;
883 jermar 175
 
877 jermar 176
    tag.value = dtlb_tag_access_read();
177
    if (tag.context != ASID_KERNEL || tag.vpn == 0) {
178
        tpc = tpc_read();
179
        tpc_str = get_symtab_entry(tpc);
873 jermar 180
 
877 jermar 181
        printf("Faulting page: %P, ASID=%d\n", tag.vpn * PAGE_SIZE, tag.context);
182
        printf("TPC=%P, (%s)\n", tpc, tpc_str ? tpc_str : "?");
183
        panic("%s\n", __FUNCTION__);
184
    }
185
 
186
    /*
187
     * Identity map piece of faulting kernel address space.
188
     */
189
    data.value = 0;
190
    data.v = true;
191
    data.size = PAGESIZE_8K;
192
    data.pfn = tag.vpn;
193
    data.l = false;
194
    data.cp = 1;
195
    data.cv = 1;
196
    data.p = true;
197
    data.w = true;
198
    data.g = true;
199
 
200
    dtlb_data_in_write(data.value);
863 jermar 201
}
202
 
203
/** DTLB protection fault handler. */
204
void fast_data_access_protection(void)
205
{
206
    panic("%s\n", __FUNCTION__);
207
}
208
 
570 jermar 209
/** Print contents of both TLBs. */
210
void tlb_print(void)
211
{
212
    int i;
213
    tlb_data_t d;
214
    tlb_tag_read_reg_t t;
215
 
216
    printf("I-TLB contents:\n");
217
    for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
218
        d.value = itlb_data_access_read(i);
613 jermar 219
        t.value = itlb_tag_read_read(i);
570 jermar 220
 
617 jermar 221
        printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
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            i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
570 jermar 223
    }
224
 
225
    printf("D-TLB contents:\n");
226
    for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
227
        d.value = dtlb_data_access_read(i);
613 jermar 228
        t.value = dtlb_tag_read_read(i);
570 jermar 229
 
617 jermar 230
        printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
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            i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
570 jermar 232
    }
233
 
234
}
617 jermar 235
 
236
/** Invalidate all unlocked ITLB and DTLB entries. */
237
void tlb_invalidate_all(void)
238
{
239
    int i;
240
    tlb_data_t d;
241
    tlb_tag_read_reg_t t;
242
 
243
    for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
244
        d.value = itlb_data_access_read(i);
245
        if (!d.l) {
246
            t.value = itlb_tag_read_read(i);
247
            d.v = false;
248
            itlb_tag_access_write(t.value);
249
            itlb_data_access_write(i, d.value);
250
        }
251
    }
252
 
253
    for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
254
        d.value = dtlb_data_access_read(i);
255
        if (!d.l) {
256
            t.value = dtlb_tag_read_read(i);
257
            d.v = false;
258
            dtlb_tag_access_write(t.value);
259
            dtlb_data_access_write(i, d.value);
260
        }
261
    }
262
 
263
}
264
 
265
/** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context).
266
 *
267
 * @param asid Address Space ID.
268
 */
269
void tlb_invalidate_asid(asid_t asid)
270
{
271
    /* TODO: write asid to some Context register and encode the register in second parameter below. */
272
    itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
273
    dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
274
}
275
 
727 jermar 276
/** Invalidate all ITLB and DTLB entries for specified page range in specified address space.
617 jermar 277
 *
278
 * @param asid Address Space ID.
727 jermar 279
 * @param page First page which to sweep out from ITLB and DTLB.
280
 * @param cnt Number of ITLB and DTLB entries to invalidate.
617 jermar 281
 */
727 jermar 282
void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
617 jermar 283
{
727 jermar 284
    int i;
285
 
286
    for (i = 0; i < cnt; i++) {
287
        /* TODO: write asid to some Context register and encode the register in second parameter below. */
288
        itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE);
289
        dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE);
290
    }
617 jermar 291
}