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756 | jermar | 1 | /* |
2 | * Copyright (C) 2006 Jakub Jermar |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
1860 | jermar | 29 | /** @addtogroup sparc64mm |
1702 | cejka | 30 | * @{ |
31 | */ |
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32 | /** @file |
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33 | */ |
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34 | |||
756 | jermar | 35 | #include <arch/mm/as.h> |
1860 | jermar | 36 | #include <arch/mm/tlb.h> |
756 | jermar | 37 | #include <genarch/mm/as_ht.h> |
830 | jermar | 38 | #include <genarch/mm/asid_fifo.h> |
1890 | jermar | 39 | #include <debug.h> |
1903 | jermar | 40 | #include <config.h> |
756 | jermar | 41 | |
1890 | jermar | 42 | #ifdef CONFIG_TSB |
43 | #include <arch/mm/tsb.h> |
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1891 | jermar | 44 | #include <arch/memstr.h> |
45 | #include <synch/mutex.h> |
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46 | #include <arch/asm.h> |
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47 | #include <mm/frame.h> |
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48 | #include <bitops.h> |
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49 | #include <macros.h> |
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1890 | jermar | 50 | #endif |
51 | |||
756 | jermar | 52 | /** Architecture dependent address space init. */ |
53 | void as_arch_init(void) |
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54 | { |
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1903 | jermar | 55 | if (config.cpu_active == 1) { |
56 | as_operations = &as_ht_operations; |
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57 | asid_fifo_init(); |
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58 | } |
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756 | jermar | 59 | } |
1702 | cejka | 60 | |
1891 | jermar | 61 | int as_constructor_arch(as_t *as, int flags) |
62 | { |
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63 | #ifdef CONFIG_TSB |
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64 | int order = fnzb32(((ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t))>>FRAME_WIDTH); |
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65 | uintptr_t tsb = (uintptr_t) frame_alloc(order, flags); |
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66 | |||
67 | if (!tsb) |
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68 | return -1; |
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69 | |||
70 | as->arch.itsb = (tsb_entry_t *) tsb; |
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71 | as->arch.dtsb = (tsb_entry_t *) (tsb + ITSB_ENTRY_COUNT * sizeof(tsb_entry_t)); |
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1892 | jermar | 72 | memsetb((uintptr_t) as->arch.itsb, (ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t), 0); |
1891 | jermar | 73 | #endif |
74 | return 0; |
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75 | } |
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76 | |||
77 | int as_destructor_arch(as_t *as) |
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78 | { |
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79 | #ifdef CONFIG_TSB |
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80 | count_t cnt = ((ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t))>>FRAME_WIDTH; |
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81 | frame_free((uintptr_t) as->arch.itsb); |
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82 | return cnt; |
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83 | #else |
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84 | return 0; |
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85 | #endif |
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86 | } |
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87 | |||
88 | int as_create_arch(as_t *as, int flags) |
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89 | { |
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90 | #ifdef CONFIG_TSB |
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91 | ipl_t ipl; |
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92 | |||
93 | ipl = interrupts_disable(); |
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94 | mutex_lock_active(&as->lock); /* completely unnecessary, but polite */ |
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95 | tsb_invalidate(as, 0, (count_t) -1); |
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96 | mutex_unlock(&as->lock); |
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97 | interrupts_restore(ipl); |
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98 | #endif |
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99 | return 0; |
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100 | } |
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101 | |||
1890 | jermar | 102 | /** Perform sparc64-specific tasks when an address space becomes active on the processor. |
103 | * |
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104 | * Install ASID and map TSBs. |
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105 | * |
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106 | * @param as Address space. |
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107 | */ |
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1860 | jermar | 108 | void as_install_arch(as_t *as) |
109 | { |
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110 | tlb_context_reg_t ctx; |
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111 | |||
112 | /* |
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1890 | jermar | 113 | * Note that we don't lock the address space. |
114 | * That's correct - we can afford it here |
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115 | * because we only read members that are |
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116 | * currently read-only. |
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117 | */ |
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118 | |||
119 | /* |
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1860 | jermar | 120 | * Write ASID to secondary context register. |
121 | * The primary context register has to be set |
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122 | * from TL>0 so it will be filled from the |
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123 | * secondary context register from the TL=1 |
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124 | * code just before switch to userspace. |
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125 | */ |
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126 | ctx.v = 0; |
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127 | ctx.context = as->asid; |
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128 | mmu_secondary_context_write(ctx.v); |
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1890 | jermar | 129 | |
130 | #ifdef CONFIG_TSB |
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1891 | jermar | 131 | uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH); |
1890 | jermar | 132 | |
1891 | jermar | 133 | ASSERT(as->arch.itsb && as->arch.dtsb); |
1890 | jermar | 134 | |
1891 | jermar | 135 | uintptr_t tsb = (uintptr_t) as->arch.itsb; |
1890 | jermar | 136 | |
1891 | jermar | 137 | if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { |
1890 | jermar | 138 | /* |
1891 | jermar | 139 | * TSBs were allocated from memory not covered |
140 | * by the locked 4M kernel DTLB entry. We need |
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141 | * to map both TSBs explicitly. |
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1890 | jermar | 142 | */ |
1891 | jermar | 143 | dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb); |
144 | dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true); |
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145 | } |
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1890 | jermar | 146 | |
1891 | jermar | 147 | /* |
148 | * Setup TSB Base registers. |
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149 | */ |
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150 | tsb_base_reg_t tsb_base; |
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151 | |||
152 | tsb_base.value = 0; |
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153 | tsb_base.size = TSB_SIZE; |
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154 | tsb_base.split = 0; |
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1890 | jermar | 155 | |
1891 | jermar | 156 | tsb_base.base = ((uintptr_t) as->arch.itsb) >> PAGE_WIDTH; |
157 | itsb_base_write(tsb_base.value); |
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158 | tsb_base.base = ((uintptr_t) as->arch.dtsb) >> PAGE_WIDTH; |
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159 | dtsb_base_write(tsb_base.value); |
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1890 | jermar | 160 | #endif |
1860 | jermar | 161 | } |
162 | |||
1890 | jermar | 163 | /** Perform sparc64-specific tasks when an address space is removed from the processor. |
164 | * |
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165 | * Demap TSBs. |
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166 | * |
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167 | * @param as Address space. |
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168 | */ |
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169 | void as_deinstall_arch(as_t *as) |
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170 | { |
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171 | |||
172 | /* |
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173 | * Note that we don't lock the address space. |
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174 | * That's correct - we can afford it here |
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175 | * because we only read members that are |
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176 | * currently read-only. |
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177 | */ |
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178 | |||
179 | #ifdef CONFIG_TSB |
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1891 | jermar | 180 | uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH); |
1890 | jermar | 181 | |
1891 | jermar | 182 | ASSERT(as->arch.itsb && as->arch.dtsb); |
1890 | jermar | 183 | |
1891 | jermar | 184 | uintptr_t tsb = (uintptr_t) as->arch.itsb; |
1890 | jermar | 185 | |
1891 | jermar | 186 | if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { |
187 | /* |
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188 | * TSBs were allocated from memory not covered |
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189 | * by the locked 4M kernel DTLB entry. We need |
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190 | * to demap the entry installed by as_install_arch(). |
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191 | */ |
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192 | dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb); |
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1890 | jermar | 193 | } |
194 | #endif |
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195 | } |
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196 | |||
1860 | jermar | 197 | /** @} |
1702 | cejka | 198 | */ |