Subversion Repositories HelenOS

Rev

Rev 793 | Rev 879 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
684 jermar 1
/*
2
 * Copyright (C) 2006 Jakub Jermar
747 jermar 3
 * Copyright (C) 2006 Jakub Vana
684 jermar 4
 * All rights reserved.
5
 *
6
 * Redistribution and use in source and binary forms, with or without
7
 * modification, are permitted provided that the following conditions
8
 * are met:
9
 *
10
 * - Redistributions of source code must retain the above copyright
11
 *   notice, this list of conditions and the following disclaimer.
12
 * - Redistributions in binary form must reproduce the above copyright
13
 *   notice, this list of conditions and the following disclaimer in the
14
 *   documentation and/or other materials provided with the distribution.
15
 * - The name of the author may not be used to endorse or promote products
16
 *   derived from this software without specific prior written permission.
17
 *
18
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
 */
29
 
30
#include <arch/mm/page.h>
747 jermar 31
#include <genarch/mm/page_ht.h>
32
#include <mm/asid.h>
749 jermar 33
#include <arch/mm/asid.h>
716 vana 34
#include <arch/types.h>
749 jermar 35
#include <typedefs.h>
728 vana 36
#include <print.h>
684 jermar 37
#include <mm/page.h>
747 jermar 38
#include <mm/frame.h>
684 jermar 39
#include <config.h>
40
#include <panic.h>
746 jermar 41
#include <arch/asm.h>
747 jermar 42
#include <arch/barrier.h>
748 jermar 43
#include <memstr.h>
684 jermar 44
 
792 jermar 45
static void set_environment(void);
749 jermar 46
 
47
/** Initialize ia64 virtual address translation subsystem. */
48
void page_arch_init(void)
49
{
793 jermar 50
    page_mapping_operations = &ht_mapping_operations;
749 jermar 51
    pk_disable();
792 jermar 52
    set_environment();
749 jermar 53
}
54
 
747 jermar 55
/** Initialize VHPT and region registers. */
792 jermar 56
void set_environment(void)
716 vana 57
{
869 vana 58
 
59
//#ifdef NEVERDEFINED   
747 jermar 60
    region_register rr;
61
    pta_register pta;  
62
    int i;
869 vana 63
 
747 jermar 64
    /*
65
     * First set up kernel region register.
66
     */
67
    rr.word = rr_read(VRN_KERNEL);
68
    rr.map.ve = 0;                  /* disable VHPT walker */
69
    rr.map.ps = PAGE_WIDTH;
70
    rr.map.rid = ASID_KERNEL;
71
    rr_write(VRN_KERNEL, rr.word);
72
    srlz_i();
73
    srlz_d();
716 vana 74
 
747 jermar 75
    /*
76
     * And invalidate the rest of region register.
77
     */
78
    for(i = 0; i < REGION_REGISTERS; i++) {
79
        /* skip kernel rr */
80
        if (i == VRN_KERNEL)
81
            continue;
728 vana 82
 
747 jermar 83
        rr.word == rr_read(i);
748 jermar 84
        rr.map.ve = 0;      /* disable VHPT walker */
747 jermar 85
        rr.map.rid = ASID_INVALID;
86
        rr_write(i, rr.word);
87
        srlz_i();
88
        srlz_d();
89
    }
726 jermar 90
 
715 vana 91
    /*
747 jermar 92
     * Set up PTA register.
93
     */
94
    pta.word = pta_read();
95
    pta.map.ve = 0;                   /* disable VHPT walker */
96
    pta.map.vf = 1;                   /* large entry format */
97
    pta.map.size = VHPT_WIDTH;
792 jermar 98
    pta.map.base = VHPT_BASE >> PTA_BASE_SHIFT;
747 jermar 99
    pta_write(pta.word);
100
    srlz_i();
101
    srlz_d();
869 vana 102
 
103
//#endif
104
 
105
    return ;   
106
 
747 jermar 107
}
728 vana 108
 
748 jermar 109
/** Calculate address of collision chain from VPN and ASID.
110
 *
749 jermar 111
 * Interrupts must be disabled.
748 jermar 112
 *
113
 * @param page Address of virtual page including VRN bits.
114
 * @param asid Address space identifier.
115
 *
792 jermar 116
 * @return VHPT entry address.
748 jermar 117
 */
792 jermar 118
vhpt_entry_t *vhpt_hash(__address page, asid_t asid)
748 jermar 119
{
120
    region_register rr_save, rr;
749 jermar 121
    index_t vrn;
122
    rid_t rid;
792 jermar 123
    vhpt_entry_t *v;
748 jermar 124
 
749 jermar 125
    vrn = page >> VRN_SHIFT;
126
    rid = ASID2RID(asid, vrn);
127
 
128
    rr_save.word = rr_read(vrn);
129
    if (rr_save.map.rid == rid) {
130
        /*
131
         * The RID is already in place, compute thash and return.
132
         */
792 jermar 133
        v = (vhpt_entry_t *) thash(page);
134
        return v;
749 jermar 135
    }
136
 
137
    /*
138
     * The RID must be written to some region register.
139
     * To speed things up, register indexed by vrn is used.
140
     */
748 jermar 141
    rr.word = rr_save.word;
749 jermar 142
    rr.map.rid = rid;
143
    rr_write(vrn, rr.word);
748 jermar 144
    srlz_i();
792 jermar 145
    v = (vhpt_entry_t *) thash(page);
749 jermar 146
    rr_write(vrn, rr_save.word);
748 jermar 147
    srlz_i();
148
    srlz_d();
149
 
792 jermar 150
    return v;
748 jermar 151
}
749 jermar 152
 
153
/** Compare ASID and VPN against PTE.
154
 *
155
 * Interrupts must be disabled.
156
 *
157
 * @param page Address of virtual page including VRN bits.
158
 * @param asid Address space identifier.
159
 *
160
 * @return True if page and asid match the page and asid of t, false otherwise.
161
 */
792 jermar 162
bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v)
749 jermar 163
{
164
    region_register rr_save, rr;   
165
    index_t vrn;
166
    rid_t rid;
167
    bool match;
168
 
792 jermar 169
    ASSERT(v);
749 jermar 170
 
171
    vrn = page >> VRN_SHIFT;
172
    rid = ASID2RID(asid, vrn);
173
 
174
    rr_save.word = rr_read(vrn);
175
    if (rr_save.map.rid == rid) {
176
        /*
177
         * The RID is already in place, compare ttag with t and return.
178
         */
792 jermar 179
        return ttag(page) == v->present.tag.tag_word;
749 jermar 180
    }
181
 
182
    /*
183
     * The RID must be written to some region register.
184
     * To speed things up, register indexed by vrn is used.
185
     */
186
    rr.word = rr_save.word;
187
    rr.map.rid = rid;
188
    rr_write(vrn, rr.word);
189
    srlz_i();
792 jermar 190
    match = (ttag(page) == v->present.tag.tag_word);
749 jermar 191
    rr_write(vrn, rr_save.word);
192
    srlz_i();
193
    srlz_d();
194
 
195
    return match;      
196
}
197
 
198
/** Set up one VHPT entry.
199
 *
200
 * @param t VHPT entry to be set up.
201
 * @param page Virtual address of the page mapped by the entry.
202
 * @param asid Address space identifier of the address space to which page belongs.
203
 * @param frame Physical address of the frame to wich page is mapped.
204
 * @param flags Different flags for the mapping.
205
 */
792 jermar 206
void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags)
749 jermar 207
{
208
    region_register rr_save, rr;   
209
    index_t vrn;
210
    rid_t rid;
211
    __u64 tag;
212
 
792 jermar 213
    ASSERT(v);
749 jermar 214
 
215
    vrn = page >> VRN_SHIFT;
216
    rid = ASID2RID(asid, vrn);
217
 
218
    /*
219
     * Compute ttag.
220
     */
221
    rr_save.word = rr_read(vrn);
222
    rr.word = rr_save.word;
223
    rr.map.rid = rid;
224
    rr_write(vrn, rr.word);
225
    srlz_i();
226
    tag = ttag(page);
227
    rr_write(vrn, rr_save.word);
228
    srlz_i();
229
    srlz_d();
230
 
231
    /*
232
     * Clear the entry.
233
     */
792 jermar 234
    v->word[0] = 0;
235
    v->word[1] = 0;
236
    v->word[2] = 0;
237
    v->word[3] = 0;
749 jermar 238
 
792 jermar 239
    v->present.p = true;
240
    v->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE;
241
    v->present.a = false;   /* not accessed */
242
    v->present.d = false;   /* not dirty */
243
    v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
244
    v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
245
    v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
246
    v->present.ppn = frame >> PPN_SHIFT;
247
    v->present.ed = false;  /* exception not deffered */
248
    v->present.ps = PAGE_WIDTH;
249
    v->present.key = 0;
250
    v->present.tag.tag_word = tag;
749 jermar 251
}