Subversion Repositories HelenOS

Rev

Rev 751 | Rev 792 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
35 jermar 1
/*
747 jermar 2
 * Copyright (C) 2005 - 2006 Jakub Jermar
3
 * Copyright (C) 2006 Jakub Vana
35 jermar 4
 * All rights reserved.
5
 *
6
 * Redistribution and use in source and binary forms, with or without
7
 * modification, are permitted provided that the following conditions
8
 * are met:
9
 *
10
 * - Redistributions of source code must retain the above copyright
11
 *   notice, this list of conditions and the following disclaimer.
12
 * - Redistributions in binary form must reproduce the above copyright
13
 *   notice, this list of conditions and the following disclaimer in the
14
 *   documentation and/or other materials provided with the distribution.
15
 * - The name of the author may not be used to endorse or promote products
16
 *   derived from this software without specific prior written permission.
17
 *
18
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
 */
29
 
30
#ifndef __ia64_PAGE_H__
31
#define __ia64_PAGE_H__
32
 
747 jermar 33
#include <arch/mm/frame.h>
34
#include <genarch/mm/page_ht.h>
749 jermar 35
#include <arch/mm/asid.h>
121 jermar 36
#include <arch/types.h>
747 jermar 37
#include <typedefs.h>
38
#include <debug.h>
35 jermar 39
 
40
#define PAGE_SIZE   FRAME_SIZE
715 vana 41
#define PAGE_WIDTH  FRAME_WIDTH
35 jermar 42
 
537 jermar 43
#define KA2PA(x)    ((__address) (x))
44
#define PA2KA(x)    ((__address) (x))
35 jermar 45
 
756 jermar 46
#define SET_PTL0_ADDRESS_ARCH(x)    /**< To be removed as situation permits. */
120 jermar 47
 
699 jermar 48
/** Implementation of page hash table interface. */
756 jermar 49
#define HT_WIDTH_ARCH                   20  /* 1M */
749 jermar 50
#define HT_HASH_ARCH(page, asid)            vhpt_hash((page), (asid))
51
#define HT_COMPARE_ARCH(page, asid, t)          vhpt_compare((page), (asid), (t))
52
#define HT_SLOT_EMPTY_ARCH(t)               ((t)->present.tag.tag_info.ti)
53
#define HT_INVALIDATE_SLOT_ARCH(t)          (t)->present.tag.tag_info.ti = true
54
#define HT_GET_NEXT_ARCH(t)             (t)->present.next
55
#define HT_SET_NEXT_ARCH(t, s)              (t)->present.next = (s)
56
#define HT_SET_RECORD_ARCH(t, page, asid, frame, flags) vhpt_set_record(t, page, asid, frame, flags)
699 jermar 57
 
749 jermar 58
#define PPN_SHIFT           12
59
 
748 jermar 60
#define VRN_SHIFT           61
61
#define VRN_MASK            (7LL << VRN_SHIFT)
747 jermar 62
#define VRN_KERNEL          0
63
#define REGION_REGISTERS        8
715 vana 64
 
747 jermar 65
#define VHPT_WIDTH          20          /* 1M */
66
#define VHPT_SIZE           (1<<VHPT_WIDTH)
67
#define VHPT_BASE           page_ht     /* Must be aligned to VHPT_SIZE */
715 vana 68
 
751 jermar 69
#define PTA_BASE_SHIFT          15
70
 
749 jermar 71
/** Memory Attributes. */
72
#define MA_WRITEBACK    0x0
73
#define MA_UNCACHEABLE  0x4
74
 
75
/** Privilege Levels. Only the most and the least privileged ones are ever used. */
76
#define PL_KERNEL   0x0
77
#define PL_USER     0x3
78
 
79
/* Access Rigths. Only certain combinations are used by the kernel. */
80
#define AR_READ     0x0
81
#define AR_EXECUTE  0x1
82
#define AR_WRITE    0x2
83
 
747 jermar 84
struct vhpt_tag_info {
85
    unsigned long long tag : 63;
86
    unsigned ti : 1;
87
} __attribute__ ((packed));
710 vana 88
 
747 jermar 89
union vhpt_tag {
90
    struct vhpt_tag_info tag_info;
91
    unsigned tag_word;
710 vana 92
};
93
 
747 jermar 94
struct vhpt_entry_present {
710 vana 95
    /* Word 0 */
747 jermar 96
    unsigned p : 1;
97
    unsigned : 1;
98
    unsigned ma : 3;
99
    unsigned a : 1;
100
    unsigned d : 1;
101
    unsigned pl : 2;
102
    unsigned ar : 3;
103
    unsigned long long ppn : 38;
104
    unsigned : 2;
105
    unsigned ed : 1;
106
    unsigned ig1 : 11;
710 vana 107
 
108
    /* Word 1 */
747 jermar 109
    unsigned : 2;
110
    unsigned ps : 6;
111
    unsigned key : 24;
112
    unsigned : 32;
710 vana 113
 
114
    /* Word 2 */
747 jermar 115
    union vhpt_tag tag;
116
 
710 vana 117
    /* Word 3 */                                                   
749 jermar 118
    pte_t *next;            /**< Collision chain next pointer. */
747 jermar 119
} __attribute__ ((packed));
710 vana 120
 
747 jermar 121
struct vhpt_entry_not_present {
710 vana 122
    /* Word 0 */
747 jermar 123
    unsigned p : 1;
124
    unsigned long long ig0 : 52;
125
    unsigned ig1 : 11;
710 vana 126
 
127
    /* Word 1 */
747 jermar 128
    unsigned : 2;
129
    unsigned ps : 6;
130
    unsigned long long ig2 : 56;
710 vana 131
 
747 jermar 132
    /* Word 2 */
133
    union vhpt_tag tag;
710 vana 134
 
135
    /* Word 3 */                                                   
749 jermar 136
    pte_t *next;            /**< Collision chain next pointer. */
710 vana 137
 
747 jermar 138
} __attribute__ ((packed));
710 vana 139
 
747 jermar 140
typedef union vhpt_entry {
141
    struct vhpt_entry_present present;
142
    struct vhpt_entry_not_present not_present;
749 jermar 143
    __u64 word[4];
747 jermar 144
} vhpt_entry;
710 vana 145
 
747 jermar 146
struct region_register_map {
147
    unsigned ve : 1;
148
    unsigned : 1;
149
    unsigned ps : 6;
150
    unsigned rid : 24;
151
    unsigned : 32;
152
} __attribute__ ((packed));
684 jermar 153
 
747 jermar 154
typedef union region_register {
155
    struct region_register_map map;
156
    unsigned long long word;
157
} region_register;
715 vana 158
 
747 jermar 159
struct pta_register_map {
160
    unsigned ve : 1;
161
    unsigned : 1;
162
    unsigned size : 6;
163
    unsigned vf : 1;
164
    unsigned : 6;
165
    unsigned long long base : 49;
166
} __attribute__ ((packed));
167
 
168
typedef union pta_register {
169
    struct pta_register_map map;
170
    __u64 word;
171
} pta_register;
172
 
173
/** Return Translation Hashed Entry Address.
174
 *
175
 * VRN bits are used to read RID (ASID) from one
176
 * of the eight region registers registers.
177
 *
178
 * @param va Virtual address including VRN bits.
179
 *
180
 * @return Address of the head of VHPT collision chain.
181
 */
182
static inline __u64 thash(__u64 va)
715 vana 183
{
747 jermar 184
    __u64 ret;
715 vana 185
 
747 jermar 186
    __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
715 vana 187
 
747 jermar 188
    return ret;
189
}
190
 
191
/** Return Translation Hashed Entry Tag.
192
 *
193
 * VRN bits are used to read RID (ASID) from one
194
 * of the eight region registers.
195
 *
196
 * @param va Virtual address including VRN bits.
197
 *
198
 * @return The unique tag for VPN and RID in the collision chain returned by thash().
199
 */
200
static inline __u64 ttag(__u64 va)
715 vana 201
{
747 jermar 202
    __u64 ret;
715 vana 203
 
747 jermar 204
    __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
205
 
206
    return ret;
207
}
208
 
209
/** Read Region Register.
210
 *
211
 * @param i Region register index.
212
 *
213
 * @return Current contents of rr[i].
214
 */
215
static inline __u64 rr_read(index_t i)
715 vana 216
{
747 jermar 217
    __u64 ret;
218
 
748 jermar 219
    ASSERT(i < REGION_REGISTERS);
747 jermar 220
    __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i));
221
 
222
    return ret;
223
}
715 vana 224
 
225
 
747 jermar 226
/** Write Region Register.
227
 *
228
 * @param i Region register index.
229
 * @param v Value to be written to rr[i].
230
 */
231
static inline void rr_write(index_t i, __u64 v)
715 vana 232
{
748 jermar 233
    ASSERT(i < REGION_REGISTERS);
747 jermar 234
    __asm__ volatile ("mov rr[%0] = %1\n" : : "r" (i), "r" (v));
235
}
236
 
237
/** Read Page Table Register.
238
 *
239
 * @return Current value stored in PTA.
240
 */
241
static inline __u64 pta_read(void)
242
{
243
    __u64 ret;
244
 
245
    __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
246
 
247
    return ret;
248
}
715 vana 249
 
747 jermar 250
/** Write Page Table Register.
251
 *
252
 * @param v New value to be stored in PTA.
253
 */
254
static inline void pta_write(__u64 v)
255
{
256
    __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
257
}
715 vana 258
 
747 jermar 259
extern void page_arch_init(void);
748 jermar 260
extern pte_t *vhpt_hash(__address page, asid_t asid);
749 jermar 261
extern bool vhpt_compare(__address page, asid_t asid, pte_t *t);
262
extern void vhpt_set_record(pte_t *t, __address page, asid_t asid, __address frame, int flags);
747 jermar 263
 
35 jermar 264
#endif