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| Rev | Author | Line No. | Line |
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| 35 | jermar | 1 | /* |
| 2 | * Copyright (C) 2005 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 1731 | jermar | 29 | /** @addtogroup ia64 |
| 1702 | cejka | 30 | * @{ |
| 31 | */ |
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| 32 | /** @file |
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| 33 | */ |
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| 34 | |||
| 35 | jermar | 35 | #ifndef __ia64_CPU_H__ |
| 36 | #define __ia64_CPU_H__ |
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| 37 | |||
| 476 | jermar | 38 | #include <arch/types.h> |
| 35 | jermar | 39 | #include <typedefs.h> |
| 476 | jermar | 40 | #include <arch/register.h> |
| 35 | jermar | 41 | |
| 476 | jermar | 42 | #define FAMILY_ITANIUM 0x7 |
| 43 | #define FAMILY_ITANIUM2 0x1f |
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| 44 | |||
| 35 | jermar | 45 | struct cpu_arch { |
| 1780 | jermar | 46 | uint64_t cpuid0; |
| 47 | uint64_t cpuid1; |
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| 476 | jermar | 48 | cpuid3_t cpuid3; |
| 35 | jermar | 49 | }; |
| 476 | jermar | 50 | |
| 51 | /** Read CPUID register. |
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| 52 | * |
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| 53 | * @param n CPUID register number. |
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| 54 | * |
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| 55 | * @return Value of CPUID[n] register. |
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| 56 | */ |
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| 1780 | jermar | 57 | static inline uint64_t cpuid_read(int n) |
| 476 | jermar | 58 | { |
| 1780 | jermar | 59 | uint64_t v; |
| 35 | jermar | 60 | |
| 476 | jermar | 61 | __asm__ volatile ("mov %0 = cpuid[%1]\n" : "=r" (v) : "r" (n)); |
| 62 | |||
| 63 | return v; |
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| 64 | } |
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| 65 | |||
| 35 | jermar | 66 | #endif |
| 1702 | cejka | 67 | |
| 1731 | jermar | 68 | /** @} |
| 1702 | cejka | 69 | */ |