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1 | jermar | 1 | /* |
2071 | jermar | 2 | * Copyright (c) 2001-2004 Jakub Jermar |
1 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
1731 | jermar | 29 | /** @addtogroup ia32 |
1702 | cejka | 30 | * @{ |
31 | */ |
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32 | /** @file |
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33 | */ |
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34 | |||
1 | jermar | 35 | #include <arch/cpu.h> |
36 | #include <arch/cpuid.h> |
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37 | #include <arch/pm.h> |
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38 | |||
39 | #include <arch.h> |
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40 | #include <arch/types.h> |
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41 | #include <print.h> |
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391 | jermar | 42 | #include <fpu_context.h> |
1 | jermar | 43 | |
16 | jermar | 44 | #include <arch/smp/apic.h> |
45 | |||
1 | jermar | 46 | /* |
47 | * Identification of CPUs. |
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48 | * Contains only non-MP-Specification specific SMP code. |
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49 | */ |
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50 | #define AMD_CPUID_EBX 0x68747541 |
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51 | #define AMD_CPUID_ECX 0x444d4163 |
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52 | #define AMD_CPUID_EDX 0x69746e65 |
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53 | |||
54 | #define INTEL_CPUID_EBX 0x756e6547 |
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55 | #define INTEL_CPUID_ECX 0x6c65746e |
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56 | #define INTEL_CPUID_EDX 0x49656e69 |
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57 | |||
141 | vana | 58 | |
1 | jermar | 59 | enum vendor { |
60 | VendorUnknown=0, |
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61 | VendorAMD, |
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62 | VendorIntel |
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63 | }; |
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64 | |||
65 | static char *vendor_str[] = { |
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66 | "Unknown Vendor", |
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67 | "AuthenticAMD", |
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68 | "GenuineIntel" |
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69 | }; |
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70 | |||
309 | palkovsky | 71 | void fpu_disable(void) |
58 | vana | 72 | { |
2082 | decky | 73 | asm volatile ( |
58 | vana | 74 | "mov %%cr0,%%eax;" |
75 | "or $8,%%eax;" |
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76 | "mov %%eax,%%cr0;" |
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77 | : |
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78 | : |
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79 | :"%eax" |
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80 | ); |
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81 | } |
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82 | |||
309 | palkovsky | 83 | void fpu_enable(void) |
58 | vana | 84 | { |
2082 | decky | 85 | asm volatile ( |
58 | vana | 86 | "mov %%cr0,%%eax;" |
87 | "and $0xffFFffF7,%%eax;" |
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88 | "mov %%eax,%%cr0;" |
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89 | : |
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90 | : |
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91 | :"%eax" |
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92 | ); |
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93 | } |
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94 | |||
1 | jermar | 95 | void cpu_arch_init(void) |
96 | { |
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1187 | jermar | 97 | cpuid_feature_info fi; |
98 | cpuid_extended_feature_info efi; |
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99 | cpu_info_t info; |
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1780 | jermar | 100 | uint32_t help = 0; |
1019 | vana | 101 | |
15 | jermar | 102 | CPU->arch.tss = tss_p; |
1780 | jermar | 103 | CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((uint8_t *) CPU->arch.tss); |
1019 | vana | 104 | |
1187 | jermar | 105 | CPU->fpu_owner = NULL; |
1019 | vana | 106 | |
107 | cpuid(1, &info); |
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108 | |||
1187 | jermar | 109 | fi.word = info.cpuid_edx; |
110 | efi.word = info.cpuid_ecx; |
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1019 | vana | 111 | |
1187 | jermar | 112 | if (fi.bits.fxsr) |
113 | fpu_fxsr(); |
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114 | else |
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115 | fpu_fsr(); |
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1019 | vana | 116 | |
1187 | jermar | 117 | if (fi.bits.sse) { |
118 | asm volatile ( |
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119 | "mov %%cr4,%0\n" |
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120 | "or %1,%0\n" |
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121 | "mov %0,%%cr4\n" |
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122 | : "+r" (help) |
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123 | : "i" (CR4_OSFXSR_MASK|(1<<10)) |
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124 | ); |
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125 | } |
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1 | jermar | 126 | } |
127 | |||
128 | void cpu_identify(void) |
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129 | { |
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130 | cpu_info_t info; |
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131 | |||
15 | jermar | 132 | CPU->arch.vendor = VendorUnknown; |
1 | jermar | 133 | if (has_cpuid()) { |
134 | cpuid(0, &info); |
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135 | |||
136 | /* |
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137 | * Check for AMD processor. |
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138 | */ |
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125 | jermar | 139 | if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) { |
15 | jermar | 140 | CPU->arch.vendor = VendorAMD; |
1 | jermar | 141 | } |
142 | |||
143 | /* |
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144 | * Check for Intel processor. |
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145 | */ |
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125 | jermar | 146 | if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) { |
15 | jermar | 147 | CPU->arch.vendor = VendorIntel; |
1 | jermar | 148 | } |
149 | |||
150 | cpuid(1, &info); |
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15 | jermar | 151 | CPU->arch.family = (info.cpuid_eax>>8)&0xf; |
152 | CPU->arch.model = (info.cpuid_eax>>4)&0xf; |
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153 | CPU->arch.stepping = (info.cpuid_eax>>0)&0xf; |
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1 | jermar | 154 | } |
155 | } |
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156 | |||
22 | jermar | 157 | void cpu_print_report(cpu_t* m) |
1 | jermar | 158 | { |
159 | printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n", |
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160 | m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping, |
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161 | m->frequency_mhz); |
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162 | } |
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1702 | cejka | 163 | |
1731 | jermar | 164 | /** @} |
1702 | cejka | 165 | */ |