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2235 stepan 1
/*
2179 stepan 2
 * Copyright (c) 2007 Petr Stepan
3
 * All rights reserved.
4
 *
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
7
 * are met:
8
 *
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
28
 
29
/** @addtogroup arm32
30
 * @{
31
 */
32
/** @file
2410 stepan 33
 *  @brief Exception handlers and exception initialization routines.
2179 stepan 34
 */
35
 
36
#include <arch/exception.h>
2326 kebrt 37
#include <arch/debug/print.h>
2179 stepan 38
#include <arch/memstr.h>
2235 stepan 39
#include <arch/regutils.h>
40
#include <interrupt.h>
2306 kebrt 41
#include <arch/machine.h>
2282 jancik 42
#include <arch/mm/page_fault.h>
3424 svoboda 43
#include <arch/barrier.h>
2284 stepan 44
#include <print.h>
2286 stepan 45
#include <syscall/syscall.h>
3123 svoboda 46
#include <udebug/udebug.h>
2179 stepan 47
 
2407 stepan 48
/** Offset used in calculation of exception handler's relative address.
49
 *
50
 * @see install_handler()
51
 */
52
#define PREFETCH_OFFSET      0x8
2329 kebrt 53
 
2407 stepan 54
/** LDR instruction's code */
2306 kebrt 55
#define LDR_OPCODE           0xe59ff000
2179 stepan 56
 
2407 stepan 57
/** Number of exception vectors. */
58
#define EXC_VECTORS          8
2329 kebrt 59
 
2407 stepan 60
/** Size of memory block occupied by exception vectors. */
61
#define EXC_VECTORS_SIZE     (EXC_VECTORS * 4)
62
 
2355 stepan 63
/** Switches to kernel stack and saves all registers there.
64
 *
65
 * Temporary exception stack is used to save a few registers
66
 * before stack switch takes place.
67
 */
2284 stepan 68
inline static void setup_stack_and_save_regs()
69
{
2464 jermar 70
    asm volatile(
71
        "ldr r13, =exc_stack        \n"
72
        "stmfd r13!, {r0}       \n"
73
        "mrs r0, spsr           \n"
74
        "and r0, r0, #0x1f      \n"
75
        "cmp r0, #0x10          \n"
76
        "bne 1f             \n"
77
 
78
        /* prev mode was usermode */
79
        "ldmfd r13!, {r0}       \n"
80
        "ldr r13, =supervisor_sp    \n"
81
        "ldr r13, [r13]         \n"
82
        "stmfd r13!, {lr}       \n"
83
        "stmfd r13!, {r0-r12}       \n"
84
        "stmfd r13!, {r13, lr}^     \n"
85
        "mrs r0, spsr           \n"
86
        "stmfd r13!, {r0}       \n"
87
        "b 2f               \n"
88
 
89
        /* mode was not usermode */
90
    "1:\n"
91
        "stmfd r13!, {r1, r2, r3}   \n"
92
        "mrs r1, cpsr           \n"
93
        "mov r2, lr         \n"
94
        "bic r1, r1, #0x1f      \n"
95
        "orr r1, r1, r0         \n"
96
        "mrs r0, cpsr           \n"
97
        "msr cpsr_c, r1         \n"
98
 
99
        "mov r3, r13            \n"
100
        "stmfd r13!, {r2}       \n"
101
        "mov r2, lr         \n"
102
        "stmfd r13!, {r4-r12}       \n"
103
        "mov r1, r13            \n"
104
        /* the following two lines are for debugging */
105
        "mov sp, #0         \n"
106
        "mov lr, #0         \n"
107
        "msr cpsr_c, r0         \n"
108
 
109
        "ldmfd r13!, {r4, r5, r6, r7}   \n"
110
        "stmfd r1!, {r4, r5, r6}    \n"
111
        "stmfd r1!, {r7}        \n"
112
        "stmfd r1!, {r2}        \n"
113
        "stmfd r1!, {r3}        \n"
114
        "mrs r0, spsr           \n"
115
        "stmfd r1!, {r0}        \n"
116
        "mov r13, r1            \n"
117
    "2:\n"
118
    );
2284 stepan 119
}
120
 
2355 stepan 121
/** Returns from exception mode.
122
 *
123
 * Previously saved state of registers (including control register)
124
 * is restored from the stack.
125
 */
2284 stepan 126
inline static void load_regs()
127
{
2464 jermar 128
    asm volatile(
129
        "ldmfd r13!, {r0}       \n"
130
        "msr spsr, r0           \n"
131
        "and r0, r0, #0x1f      \n"
132
        "cmp r0, #0x10          \n"
133
        "bne 1f             \n"
134
 
135
        /* return to user mode */
136
        "ldmfd r13!, {r13, lr}^     \n"
137
        "b 2f               \n"
138
 
139
        /* return to non-user mode */
140
    "1:\n"
141
        "ldmfd r13!, {r1, r2}       \n"
142
        "mrs r3, cpsr           \n"
143
        "bic r3, r3, #0x1f      \n"
144
        "orr r3, r3, r0         \n"
145
        "mrs r0, cpsr           \n"
146
        "msr cpsr_c, r3         \n"
147
 
148
        "mov r13, r1            \n"
149
        "mov lr, r2         \n"
150
        "msr cpsr_c, r0         \n"
151
 
152
        /* actual return */
153
    "2:\n"
154
        "ldmfd r13, {r0-r12, pc}^\n"
155
    );
2284 stepan 156
}
157
 
2411 stepan 158
 
2407 stepan 159
/** Switch CPU to mode in which interrupts are serviced (currently it
160
 * is Undefined mode).
161
 *
162
 * The default mode for interrupt servicing (Interrupt Mode)
163
 * can not be used because of nested interrupts (which can occur
2464 jermar 164
 * because interrupts are enabled in higher levels of interrupt handler).
2407 stepan 165
 */
2414 kebrt 166
inline static void switch_to_irq_servicing_mode()
2407 stepan 167
{
168
    /* switch to Undefined mode */
169
    asm volatile(
170
        /* save regs used during switching */
171
        "stmfd sp!, {r0-r3}     \n"
172
 
173
        /* save stack pointer and link register to r1, r2 */
174
        "mov r1, sp         \n"
175
        "mov r2, lr         \n"
176
 
177
        /* mode switch */
178
        "mrs r0, cpsr           \n"
179
        "bic r0, r0, #0x1f      \n"
180
        "orr r0, r0, #0x1b      \n"
181
        "msr cpsr_c, r0         \n"
182
 
183
        /* restore saved sp and lr */
184
        "mov sp, r1         \n"
185
        "mov lr, r2         \n"
186
 
187
        /* restore original regs */
188
        "ldmfd sp!, {r0-r3}     \n"
189
    );
190
}
191
 
2355 stepan 192
/** Calls exception dispatch routine. */
2235 stepan 193
#define CALL_EXC_DISPATCH(exception)        \
194
    asm("mov r0, %0" : : "i" (exception));  \
2284 stepan 195
    asm("mov r1, r13");         \
2235 stepan 196
    asm("bl exc_dispatch");     
197
 
198
/** General exception handler.
2355 stepan 199
 *
2235 stepan 200
 *  Stores registers, dispatches the exception,
201
 *  and finally restores registers and returns from exception processing.
2329 kebrt 202
 *
203
 *  @param exception Exception number.
2235 stepan 204
 */
205
#define PROCESS_EXCEPTION(exception)        \
2284 stepan 206
    setup_stack_and_save_regs();        \
2235 stepan 207
    CALL_EXC_DISPATCH(exception)        \
2284 stepan 208
    load_regs();
2235 stepan 209
 
210
/** Updates specified exception vector to jump to given handler.
2355 stepan 211
 *
2329 kebrt 212
 *  Addresses of handlers are stored in memory following exception vectors.
2235 stepan 213
 */
3424 svoboda 214
static void install_handler(unsigned handler_addr, unsigned *vector)
2235 stepan 215
{
216
    /* relative address (related to exc. vector) of the word
217
     * where handler's address is stored
218
    */
2611 jermar 219
    volatile uint32_t handler_address_ptr = EXC_VECTORS_SIZE -
220
        PREFETCH_OFFSET;
2179 stepan 221
 
2235 stepan 222
    /* make it LDR instruction and store at exception vector */
223
    *vector = handler_address_ptr | LDR_OPCODE;
3424 svoboda 224
    smc_coherence(*vector);
2179 stepan 225
 
2235 stepan 226
    /* store handler's address */
227
    *(vector + EXC_VECTORS) = handler_addr;
2284 stepan 228
 
2179 stepan 229
}
230
 
2329 kebrt 231
/** Low-level Reset Exception handler. */
3424 svoboda 232
static void reset_exception_entry(void)
2235 stepan 233
{
234
    PROCESS_EXCEPTION(EXC_RESET);
2179 stepan 235
}
236
 
2329 kebrt 237
/** Low-level Software Interrupt Exception handler. */
3424 svoboda 238
static void swi_exception_entry(void)
2235 stepan 239
{
240
    PROCESS_EXCEPTION(EXC_SWI);
2179 stepan 241
}
242
 
2329 kebrt 243
/** Low-level Undefined Instruction Exception handler. */
3424 svoboda 244
static void undef_instr_exception_entry(void)
2235 stepan 245
{
246
    PROCESS_EXCEPTION(EXC_UNDEF_INSTR);
247
}
248
 
2329 kebrt 249
/** Low-level Fast Interrupt Exception handler. */
3424 svoboda 250
static void fiq_exception_entry(void)
2235 stepan 251
{
252
    PROCESS_EXCEPTION(EXC_FIQ);
253
}
254
 
2329 kebrt 255
/** Low-level Prefetch Abort Exception handler. */
3424 svoboda 256
static void prefetch_abort_exception_entry(void)
2235 stepan 257
{
258
    asm("sub lr, lr, #4");
259
    PROCESS_EXCEPTION(EXC_PREFETCH_ABORT);
260
}
261
 
2329 kebrt 262
/** Low-level Data Abort Exception handler. */
3424 svoboda 263
static void data_abort_exception_entry(void)
2235 stepan 264
{
265
    asm("sub lr, lr, #8");
266
    PROCESS_EXCEPTION(EXC_DATA_ABORT);
267
}
268
 
2355 stepan 269
/** Low-level Interrupt Exception handler.
270
 *
271
 * CPU is switched to Undefined mode before further interrupt processing
272
 * because of possible occurence of nested interrupt exception, which
273
 * would overwrite (and thus spoil) stack pointer.
274
 */
3424 svoboda 275
static void irq_exception_entry(void)
2235 stepan 276
{
277
    asm("sub lr, lr, #4");
2344 stepan 278
    setup_stack_and_save_regs();
2407 stepan 279
 
2414 kebrt 280
    switch_to_irq_servicing_mode();
2407 stepan 281
 
2344 stepan 282
    CALL_EXC_DISPATCH(EXC_IRQ)
283
 
284
    load_regs();
2235 stepan 285
}
286
 
2286 stepan 287
/** Software Interrupt handler.
288
 *
289
 * Dispatches the syscall.
290
 */
2304 kebrt 291
static void swi_exception(int exc_no, istate_t *istate)
2284 stepan 292
{
2464 jermar 293
    istate->r0 = syscall_handler(istate->r0, istate->r1, istate->r2,
2611 jermar 294
        istate->r3, istate->r4, istate->r5, istate->r6);
2284 stepan 295
}
296
 
2235 stepan 297
/** Interrupt Exception handler.
2286 stepan 298
 *
2464 jermar 299
 * Determines the sources of interrupt and calls their handlers.
2235 stepan 300
 */
2304 kebrt 301
static void irq_exception(int exc_no, istate_t *istate)
2235 stepan 302
{
2306 kebrt 303
    machine_irq_exception(exc_no, istate);
2235 stepan 304
}
305
 
2329 kebrt 306
/** Fills exception vectors with appropriate exception handlers. */
2235 stepan 307
void install_exception_handlers(void)
308
{
2464 jermar 309
    install_handler((unsigned) reset_exception_entry,
310
        (unsigned *) EXC_RESET_VEC);
2235 stepan 311
 
2464 jermar 312
    install_handler((unsigned) undef_instr_exception_entry,
313
        (unsigned *) EXC_UNDEF_INSTR_VEC);
2235 stepan 314
 
2464 jermar 315
    install_handler((unsigned) swi_exception_entry,
316
        (unsigned *) EXC_SWI_VEC);
2235 stepan 317
 
2464 jermar 318
    install_handler((unsigned) prefetch_abort_exception_entry,
319
        (unsigned *) EXC_PREFETCH_ABORT_VEC);
2235 stepan 320
 
2464 jermar 321
    install_handler((unsigned) data_abort_exception_entry,
322
        (unsigned *) EXC_DATA_ABORT_VEC);
2235 stepan 323
 
2464 jermar 324
    install_handler((unsigned) irq_exception_entry,
325
        (unsigned *) EXC_IRQ_VEC);
2235 stepan 326
 
327
    install_handler((unsigned)fiq_exception_entry,
2464 jermar 328
        (unsigned *) EXC_FIQ_VEC);
2179 stepan 329
}
330
 
2284 stepan 331
#ifdef HIGH_EXCEPTION_VECTORS
2329 kebrt 332
/** Activates use of high exception vectors addresses. */
2464 jermar 333
static void high_vectors(void)
2262 stepan 334
{
335
    uint32_t control_reg;
336
 
2464 jermar 337
    asm volatile("mrc p15, 0, %0, c1, c1" : "=r" (control_reg));
2262 stepan 338
 
2464 jermar 339
    /* switch on the high vectors bit */
2262 stepan 340
    control_reg |= CP15_R1_HIGH_VECTORS_BIT;
341
 
2464 jermar 342
    asm volatile("mcr p15, 0, %0, c1, c1" : : "r" (control_reg));
2262 stepan 343
}
2284 stepan 344
#endif
2262 stepan 345
 
2245 stepan 346
/** Initializes exception handling.
347
 *
348
 * Installs low-level exception handlers and then registers
349
 * exceptions and their handlers to kernel exception dispatcher.
350
 */
2235 stepan 351
void exception_init(void)
352
{
2262 stepan 353
#ifdef HIGH_EXCEPTION_VECTORS
354
    high_vectors();
355
#endif
2245 stepan 356
    install_exception_handlers();
357
 
2235 stepan 358
    exc_register(EXC_IRQ, "interrupt", (iroutine) irq_exception);
2464 jermar 359
    exc_register(EXC_PREFETCH_ABORT, "prefetch abort",
360
        (iroutine) prefetch_abort);
3125 svoboda 361
    exc_register(EXC_DATA_ABORT, "data abort", (iroutine) data_abort);
2284 stepan 362
    exc_register(EXC_SWI, "software interrupt", (iroutine) swi_exception);
2179 stepan 363
}
364
 
2326 kebrt 365
/** Prints #istate_t structure content.
366
 *
367
 * @param istate Structure to be printed.
368
 */
2304 kebrt 369
void print_istate(istate_t *istate)
370
{
371
    dprintf("istate dump:\n");
372
 
373
    dprintf(" r0: %x    r1: %x    r2: %x    r3: %x\n",
2464 jermar 374
        istate->r0, istate->r1, istate->r2, istate->r3);
2304 kebrt 375
    dprintf(" r4: %x    r5: %x    r6: %x    r7: %x\n",
2464 jermar 376
        istate->r4, istate->r5, istate->r6, istate->r7);
2304 kebrt 377
    dprintf(" r8: %x    r8: %x   r10: %x   r11: %x\n",
2464 jermar 378
        istate->r8, istate->r9, istate->r10, istate->r11);
2304 kebrt 379
    dprintf(" r12: %x    sp: %x    lr: %x  spsr: %x\n",
2464 jermar 380
        istate->r12, istate->sp, istate->lr, istate->spsr);
2304 kebrt 381
 
382
    dprintf(" pc: %x\n", istate->pc);
383
}
384
 
2179 stepan 385
/** @}
386
 */