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206 palkovsky 1
/*
2071 jermar 2
 * Copyright (c) 2005 Ondrej Palkovsky
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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1842 jermar 29
/** @addtogroup amd64
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 * @{
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 */
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/** @file
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 */
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#include <arch.h>
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#include <arch/types.h>
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#include <config.h>
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#include <proc/thread.h>
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#include <arch/drivers/ega.h>
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#include <arch/drivers/vesa.h>
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#include <genarch/kbd/i8042.h>
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#include <arch/drivers/i8254.h>
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#include <arch/drivers/i8259.h>
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#ifdef CONFIG_SMP
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#include <arch/smp/apic.h>
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#endif
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#include <arch/bios/bios.h>
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#include <arch/cpu.h>
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#include <print.h>
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#include <arch/cpuid.h>
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#include <genarch/acpi/acpi.h>
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#include <panic.h>
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#include <interrupt.h>
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#include <arch/syscall.h>
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#include <arch/debugger.h>
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#include <syscall/syscall.h>
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#include <console/console.h>
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#include <ddi/irq.h>
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#include <ddi/device.h>
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1112 palkovsky 66
 
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/** Disable I/O on non-privileged levels
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 *
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 * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
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 */
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static void clean_IOPL_NT_flags(void)
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{
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    asm (
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        "pushfq\n"
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        "pop %%rax\n"
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        "and $~(0x7000), %%rax\n"
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        "pushq %%rax\n"
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        "popfq\n"
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        :
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        :
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        : "%rax"
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    );
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}
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/** Disable alignment check
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 *
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 * Clean AM(18) flag in CR0 register
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 */
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static void clean_AM_flag(void)
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{
2697 decky 91
    asm (
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        "mov %%cr0, %%rax\n"
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        "and $~(0x40000), %%rax\n"
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        "mov %%rax, %%cr0\n"
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        :
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        :
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        : "%rax"
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    );
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}
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void arch_pre_mm_init(void)
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{
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    /* Enable no-execute pages */
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    set_efer_flag(AMD_NXE_FLAG);
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    /* Enable FPU */
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    cpu_setup_fpu();
803 palkovsky 107
 
799 palkovsky 108
    /* Initialize segmentation */
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    pm_init();
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    /* Disable I/O on nonprivileged levels
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     * clear the NT (nested-thread) flag
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     */
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    clean_IOPL_NT_flags();
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    /* Disable alignment check */
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    clean_AM_flag();
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    if (config.cpu_active == 1) {
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        interrupt_init();
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        bios_init();
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        /* PIC */
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        i8259_init();
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    }
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}
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2697 decky 127
 
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void arch_post_mm_init(void)
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{
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    if (config.cpu_active == 1) {
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        /* Initialize IRQ routing */
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        irq_init(IRQ_COUNT, IRQ_COUNT);
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        /* hard clock */
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        i8254_init();
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1289 vana 137
#ifdef CONFIG_FB
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        if (vesa_present())
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            vesa_init();
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        else
1289 vana 141
#endif
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            ega_init(); /* video */
1958 decky 143
 
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        /* Enable debugger */
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        debugger_init();
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        /* Merge all memory zones to 1 big zone */
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        zone_merge_all();
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    }
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    /* Setup fast SYSCALL/SYSRET */
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    syscall_setup_cpu();
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}
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1901 jermar 154
void arch_post_cpu_init()
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{
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#ifdef CONFIG_SMP
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    if (config.cpu_active > 1) {
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        l_apic_init();
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        l_apic_debug();
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    }
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#endif
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}
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503 jermar 164
void arch_pre_smp_init(void)
242 palkovsky 165
{
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    if (config.cpu_active == 1) {
2723 decky 167
#ifdef CONFIG_SMP
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        acpi_init();
2723 decky 169
#endif /* CONFIG_SMP */
242 palkovsky 170
    }
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}
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503 jermar 173
void arch_post_smp_init(void)
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{
1958 decky 175
    /* keyboard controller */
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    i8042_init(device_assign_devno(), IRQ_KBD, device_assign_devno(), IRQ_MOUSE);
503 jermar 177
}
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242 palkovsky 179
void calibrate_delay_loop(void)
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{
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    i8254_calibrate_delay_loop();
1958 decky 182
    if (config.cpu_active == 1) {
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        /*
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         * This has to be done only on UP.
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         * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
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         */
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        i8254_normal_operation();
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    }
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}
1112 palkovsky 190
 
1121 jermar 191
/** Set thread-local-storage pointer
1112 palkovsky 192
 *
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 * TLS pointer is set in FS register. Unfortunately the 64-bit
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 * part can be set only in CPL0 mode.
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 *
1121 jermar 196
 * The specs say, that on %fs:0 there is stored contents of %fs register,
1112 palkovsky 197
 * we need not to go to CPL0 to read it.
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 */
1780 jermar 199
unative_t sys_tls_set(unative_t addr)
1112 palkovsky 200
{
1184 jermar 201
    THREAD->arch.tls = addr;
1112 palkovsky 202
    write_msr(AMD_MSR_FS, addr);
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    return 0;
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}
1474 palkovsky 205
 
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/** Acquire console back for kernel
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 *
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 */
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void arch_grab_console(void)
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{
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    i8042_grab();
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}
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/** Return console to userspace
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 *
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 */
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void arch_release_console(void)
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{
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    i8042_release();
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}
1702 cejka 220
 
1842 jermar 221
/** @}
1702 cejka 222
 */