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3743 rimsky 1
#
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# Copyright (c) 2005 Jakub Jermar
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# Copyright (c) 2008 Pavel Rimsky
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#include <arch/arch.h>
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#include <arch/stack.h>
4614 rimsky 32
#include <arch/context_offset.h>
3743 rimsky 33
#include <arch/sun4v/regdef.h>
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#include <arch/sun4v/hypercall.h>
3835 rimsky 35
#include <arch/sun4v/arch.h>
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#include <arch/sun4v/cpu.h>
3770 rimsky 37
#include <arch/mm/pagesize.h>
3743 rimsky 38
#include <arch/mm/sun4v/tte.h>
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#include <arch/mm/sun4v/mmu.h>
3770 rimsky 40
#include <arch/mm/sun4v/tlb.h>
3743 rimsky 41
 
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.register %g2, #scratch
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.register %g3, #scratch
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.section K_TEXT_START, "ax"
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#define BSP_FLAG		1
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#define PHYSMEM_ADDR_SIZE	56
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/*
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 * Flags set in the TTE data entry mapping the kernel.
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 */
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#ifdef CONFIG_VIRT_IDX_DCACHE
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	#define TTE_FLAGS \
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		(1 << TTE_V_SHIFT) \
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		| (1 << TTE_EP_SHIFT) \
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		| (1 << TTE_CP_SHIFT) \
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		| (1 << TTE_CV_SHIFT) \
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		| (1 << TTE_P_SHIFT) \
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		| (1 << TTE_W_SHIFT)
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#else
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	#define TTE_FLAGS \
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		(1 << TTE_V_SHIFT) \
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		| (1 << TTE_EP_SHIFT) \
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		| (1 << TTE_CP_SHIFT) \
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		| (1 << TTE_P_SHIFT) \
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		| (1 << TTE_W_SHIFT)
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#endif
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70
 
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/*
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 * Fills a register with a TTE Data item. The item will map the given virtual
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 * address to a real address which will be computed by adding the starting
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 * address of the physical memory to the virtual address.
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 *
76
 * parameters:
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 * 	addr:			virtual address to be mapped
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 *	rphysmem_start:		register containing the starting address of the
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 *				physical memory
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 *	rtmp1:			a register to be used as temporary
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 *	rtmp2:			a register to be used as temporary
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 *	rd:			register where the result will be saved
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 */
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#define TTE_DATA(addr, rphysmem_start, rtmp1, rtmp2, rd) \
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	setx TTE_FLAGS | PAGESIZE_4M, rtmp1, rd; \
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	add rd, rphysmem_start, rd; \
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	setx (addr), rtmp1, rtmp2; \
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	add rd, rtmp2, rd;
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90
/*
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 * Here is where the kernel is passed control from the boot loader.
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 * 
93
 * The registers are expected to be in this state:
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 * - %o0 starting address of physical memory + bootstrap processor flag
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 * 	bits 63...1:	physical memory starting address / 2
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 *	bit 0:		non-zero on BSP processor, zero on AP processors
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 * - %o1 bootinfo structure address (BSP only)
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 * - %o2 bootinfo structure size (BSP only)
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 *
100
 * Moreover, we depend on boot having established the following environment:
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 * - TLBs are on
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 * - identity mapping for the kernel image
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 */
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.global kernel_image_start
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kernel_image_start:
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	mov BSP_FLAG, %l0
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	and %o0, %l0, %l7			! l7 <= bootstrap processor?
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	andn %o0, %l0, %l6			! l6 <= start of physical memory
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	or %o1, %g0, %l1
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	or %o2, %g0, %l2
111
 
112
	! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base.
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	srlx %l6, 13, %l5
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115
	! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13]
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	sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5
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	srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5	
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119
	/*
120
	 * Setup basic runtime environment.
121
	 */
122
	wrpr %g0, NWINDOWS - 2, %cansave	! set maximum saveable windows
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	wrpr %g0, 0, %canrestore		! get rid of windows we will
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						! never need again
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	wrpr %g0, 0, %otherwin			! make sure the window state is
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						! consistent
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	wrpr %g0, NWINDOWS - 1, %cleanwin	! prevent needless clean_window
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						! traps for kernel
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130
	wrpr %g0, 0, %wstate			! use default spill/fill trap
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132
	wrpr %g0, 0, %tl			! TL = 0, primary context
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						! register is used
4638 rimsky 134
	wrpr %g0, 0, %gl
3743 rimsky 135
 
136
	wrpr %g0, PSTATE_PRIV_BIT, %pstate	! disable interrupts and disable
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						! 32-bit address masking
138
 
139
	wrpr %g0, 0, %pil			! intialize %pil
140
 
141
	/*
142
	 * Switch to kernel trap table.
143
	 */
144
	sethi %hi(trap_table), %g1
145
	wrpr %g1, %lo(trap_table), %tba
146
 
4614 rimsky 147
	/* Explicitly switch to hypervisor API 1.1. */
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	mov 1, %o0
149
   	mov 1, %o1
150
   	mov 1, %o2
151
   	mov 0, %o3
152
   	mov 0, %o4
153
   	mov 0, %o5
154
   	ta 0xff
155
   	nop
3743 rimsky 156
 
157
	/*
158
	 * Take over the MMU.
159
	 */
160
 
161
	! map kernel in context 1
162
	set kernel_image_start, %o0				! virt. address
163
	set 1, %o1						! context
164
	TTE_DATA(kernel_image_start, %l5, %g2, %g3, %o2)	! TTE data
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	set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3			! MMU flags
166
	__HYPERCALL_HYPERFAST(MMU_MAP_ADDR)
167
 
168
	! switch to context 1
169
	set 1, %o0
170
	set VA_PRIMARY_CONTEXT_REG, %o1
171
	stxa %o0, [%o1] ASI_PRIMARY_CONTEXT_REG
172
 
173
	! demap all in context 0
174
	set 0, %o0						! reserved
175
	set 0, %o1						! reserved
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	set 0, %o2						! context
177
	set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3			! MMU flags
178
	__HYPERCALL_FAST(MMU_DEMAP_CTX)
179
 
180
	! install permanent mapping for kernel in context 0
181
	set kernel_image_start, %o0				! virtual address
182
	set 0, %o1						! context
183
	TTE_DATA(kernel_image_start, %l5, %g2, %g3, %o2)	! TTE data
184
	set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3			! MMU flags
185
	__HYPERCALL_FAST(MMU_MAP_PERM_ADDR)
186
 
187
	! switch to context 0
188
	mov 0, %o0
189
	set VA_PRIMARY_CONTEXT_REG, %o1
190
	stxa %o0, [%o1] ASI_PRIMARY_CONTEXT_REG
191
 
192
	! demap all in context 1 (cleanup)
193
	set 0, %o0						! reserved
194
	set 0, %o1						! reserved
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	set 1, %o2						! context
196
	set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3			! MMU flags
197
	__HYPERCALL_FAST(MMU_DEMAP_CTX)
198
 
199
	/*
3835 rimsky 200
	 * Set CPUID.
201
	 */
202
	__HYPERCALL_FAST(CPU_MYID)
203
	mov SCRATCHPAD_CPUID, %g1
204
	stxa %o1, [%g1] ASI_SCRATCHPAD
205
 
206
	/*
207
	 * Set MMU fault status area for the current CPU.
208
	 */
209
	set mmu_fsas, %o0			! o0 <= addr. of fault status areas array
210
	add %o0, %l6, %o0			! kernel address to real address
211
	mulx %o1, MMU_FSA_SIZE, %g1		! g1 <= offset of current CPU's fault status area
212
	add %g1, %o0, %o0			! o0 <= FSA of the current CPU
213
	mov SCRATCHPAD_MMU_FSA, %g1
214
	stxa %o0, [%g1] ASI_SCRATCHPAD		! remember MMU fault status area to speed up miss handler
215
	__HYPERCALL_FAST(MMU_FAULT_AREA_CONF)
4614 rimsky 216
 
217
	! on APs skip executing the following code
218
	cmp %l7, 0
219
	be 1f
220
	nop
221
 
3835 rimsky 222
	/*
4614 rimsky 223
	 * Save physmem_base for use by the mm subsystem.
224
	 * %l6 contains starting physical address
225
	 */	
226
	sethi %hi(physmem_base), %l4
227
	stx %l6, [%l4 + %lo(physmem_base)]
228
 
229
	/*
3835 rimsky 230
	 * Store a template of a TTE Data entry for kernel mappings.
231
	 * This template will be used from the kernel MMU miss handler.
232
	 */
233
	!TTE_DATA(0, %l5, %g2, %g3, %g1)
234
	setx TTE_FLAGS | PAGESIZE_8K, %g2, %g1; \
235
	add %g1, %l5, %g1; \
236
	set kernel_8k_tlb_data_template, %g4
237
	stx %g1, [%g4]
238
 
239
	/*
3743 rimsky 240
	 * So far, we have not touched the stack.
241
	 * It is a good idea to set the kernel stack to a known state now.
242
	 */
243
	sethi %hi(temporary_boot_stack), %sp
244
	or %sp, %lo(temporary_boot_stack), %sp
245
	sub %sp, STACK_BIAS, %sp
246
 
247
	or %l1, %g0, %o1
248
	or %l2, %g0, %o2
249
	sethi %hi(bootinfo), %o0
250
	call memcpy				! copy bootinfo
251
	or %o0, %lo(bootinfo), %o0
252
 
253
	call arch_pre_main
254
	nop
255
 
256
	call main_bsp
257
	nop
258
 
259
	/* Not reached. */
260
 
261
0:
262
	ba 0b
263
	nop
264
 
4614 rimsky 265
1:
266
 
267
#ifdef CONFIG_SMP
268
 
269
	/*
270
	 * Configure stack for the AP.
271
	 * The AP is expected to use the stack saved
272
	 * in the ctx global variable.
273
	 */
274
 
275
	mov	1, %o0			! MMU enable flag
276
	set	mmu_enabled, %o1
277
	mov	MMU_ENABLE, %o5	! MMU enable HV call
278
	ta	0x80		! call HV
279
 
280
	mmu_enabled:
281
 
282
	/*
283
	 * Configure stack for the AP.
284
	 * The AP is expected to use the stack saved
285
	 * in the ctx global variable.
286
	 */
287
	set ctx, %g1
288
	add %g1, OFFSET_SP, %g1
289
	ldx [%g1], %o6
290
 
291
	call main_ap
292
	nop
293
#endif
294
 
295
	/* Not reached. */
296
0:
297
	ba 0b
298
	nop
299
 
4638 rimsky 300
.align 8
301
.global temp_cpu_mondo_handler
302
temp_cpu_mondo_handler:
303
 
304
	set 0x3c, %o0
305
	set 0x15, %o5
306
	ta 0x80
307
 
308
	mov 0, %o0
309
	setx before_ap_boots, %g1, %o1
310
	setx 0x80400000, %g1, %o2
311
	add %o1, %o2, %o1
312
	__HYPERCALL_FAST(MMU_ENABLE)
313
 
314
before_ap_boots:
315
	setx 0x80400000, %g0, %o0
316
	ba kernel_image_start
317
	nop
318
 
3743 rimsky 319
.section K_DATA_START, "aw", @progbits
320
 
321
#define INITIAL_STACK_SIZE		1024
322
 
323
.align STACK_ALIGNMENT
324
	.space INITIAL_STACK_SIZE
325
.align STACK_ALIGNMENT
326
temporary_boot_stack:
327
	.space STACK_WINDOW_SAVE_AREA_SIZE
328
 
329
 
330
.data
331
 
332
.align 8
333
.global physmem_base		! copy of the physical memory base address
334
physmem_base:
335
	.quad 0
3835 rimsky 336
 
337
.global kernel_8k_tlb_data_template
338
kernel_8k_tlb_data_template:
339
	.quad 0
340
 
341
/* MMU fault status areas for all CPUs */
342
.align MMU_FSA_ALIGNMENT
343
.global mmu_fsas
344
mmu_fsas:
3993 rimsky 345
	.space (MMU_FSA_SIZE * MAX_NUM_STRANDS)