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4638 | rimsky | 1 | /* |
2 | * Copyright (c) 2006 Jakub Jermar |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
29 | /** @addtogroup sparc64 |
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30 | * @{ |
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31 | */ |
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32 | /** @file |
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33 | */ |
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34 | |||
35 | #include <smp/ipi.h> |
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36 | #include <cpu.h> |
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37 | #include <arch.h> |
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38 | #include <arch/cpu.h> |
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39 | #include <arch/asm.h> |
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40 | #include <config.h> |
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41 | #include <mm/tlb.h> |
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42 | #include <arch/interrupt.h> |
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43 | #include <arch/trap/interrupt.h> |
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44 | #include <arch/barrier.h> |
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45 | #include <preemption.h> |
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46 | #include <time/delay.h> |
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47 | #include <panic.h> |
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48 | |||
49 | /** Set the contents of the outgoing interrupt vector data. |
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50 | * |
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51 | * The first data item (data 0) will be set to the value of func, the |
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52 | * rest of the vector will contain zeros. |
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53 | * |
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54 | * This is a helper function used from within the cross_call function. |
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55 | * |
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56 | * @param func value the first data item of the vector will be set to |
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57 | */ |
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58 | static inline void set_intr_w_data(void (* func)(void)) |
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59 | { |
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60 | #if defined (US) |
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61 | asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_0, (uintptr_t) func); |
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62 | asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_1, 0); |
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63 | asi_u64_write(ASI_INTR_W, ASI_UDB_INTR_W_DATA_2, 0); |
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64 | #elif defined (US3) |
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65 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_0, (uintptr_t) func); |
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66 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_1, 0); |
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67 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_2, 0); |
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68 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_3, 0); |
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69 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_4, 0); |
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70 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_5, 0); |
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71 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_6, 0); |
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72 | asi_u64_write(ASI_INTR_W, VA_INTR_W_DATA_7, 0); |
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73 | #endif |
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74 | } |
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75 | |||
76 | /** Invoke function on another processor. |
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77 | * |
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78 | * Currently, only functions without arguments are supported. |
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79 | * Supporting more arguments in the future should be no big deal. |
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80 | * |
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81 | * Interrupts must be disabled prior to this call. |
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82 | * |
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83 | * @param mid MID of the target processor. |
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84 | * @param func Function to be invoked. |
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85 | */ |
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86 | static void cross_call(int mid, void (* func)(void)) |
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87 | { |
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88 | uint64_t status; |
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89 | bool done; |
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90 | |||
91 | /* |
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92 | * This function might enable interrupts for a while. |
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93 | * In order to prevent migration to another processor, |
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94 | * we explicitly disable preemption. |
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95 | */ |
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96 | |||
97 | preemption_disable(); |
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98 | |||
99 | status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0); |
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100 | if (status & INTR_DISPATCH_STATUS_BUSY) |
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101 | panic("Interrupt Dispatch Status busy bit set\n"); |
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102 | |||
103 | ASSERT(!(pstate_read() & PSTATE_IE_BIT)); |
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104 | |||
105 | do { |
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106 | set_intr_w_data(func); |
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107 | asi_u64_write(ASI_INTR_W, |
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108 | (mid << INTR_VEC_DISPATCH_MID_SHIFT) | |
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109 | VA_INTR_W_DISPATCH, 0); |
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110 | |||
111 | membar(); |
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112 | |||
113 | do { |
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114 | status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0); |
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115 | } while (status & INTR_DISPATCH_STATUS_BUSY); |
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116 | |||
117 | done = !(status & INTR_DISPATCH_STATUS_NACK); |
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118 | if (!done) { |
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119 | /* |
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120 | * Prevent deadlock. |
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121 | */ |
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122 | (void) interrupts_enable(); |
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123 | delay(20 + (tick_read() & 0xff)); |
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124 | (void) interrupts_disable(); |
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125 | } |
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126 | } while (done); |
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127 | |||
128 | preemption_enable(); |
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129 | } |
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130 | |||
131 | /* |
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132 | * Deliver IPI to all processors except the current one. |
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133 | * |
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134 | * The sparc64 architecture does not support any group addressing |
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135 | * which is found, for instance, on ia32 and amd64. Therefore we |
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136 | * need to simulate the broadcast by sending the message to |
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137 | * all target processors step by step. |
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138 | * |
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139 | * We assume that interrupts are disabled. |
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140 | * |
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141 | * @param ipi IPI number. |
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142 | */ |
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143 | void ipi_broadcast_arch(int ipi) |
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144 | { |
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145 | unsigned int i; |
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146 | |||
147 | void (* func)(void); |
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148 | |||
149 | switch (ipi) { |
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150 | case IPI_TLB_SHOOTDOWN: |
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151 | func = tlb_shootdown_ipi_recv; |
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152 | break; |
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153 | default: |
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154 | panic("Unknown IPI (%d).\n", ipi); |
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155 | break; |
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156 | } |
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157 | |||
158 | /* |
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159 | * As long as we don't support hot-plugging |
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160 | * or hot-unplugging of CPUs, we can walk |
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161 | * the cpus array and read processor's MID |
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162 | * without locking. |
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163 | */ |
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164 | |||
165 | for (i = 0; i < config.cpu_active; i++) { |
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166 | if (&cpus[i] == CPU) |
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167 | continue; /* skip the current CPU */ |
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168 | |||
169 | cross_call(cpus[i].arch.mid, func); |
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170 | } |
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171 | } |
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172 | |||
173 | /** @} |
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174 | */ |