Subversion Repositories HelenOS

Rev

Rev 3135 | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
2235 stepan 1
/*
2179 stepan 2
 * Copyright (c) 2007 Petr Stepan
3
 * All rights reserved.
4
 *
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
7
 * are met:
8
 *
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
28
 
29
/** @addtogroup arm32
30
 * @{
31
 */
32
/** @file
2410 stepan 33
 *  @brief Exception handlers and exception initialization routines.
2179 stepan 34
 */
35
 
36
#include <arch/exception.h>
2326 kebrt 37
#include <arch/debug/print.h>
2179 stepan 38
#include <arch/memstr.h>
2235 stepan 39
#include <arch/regutils.h>
40
#include <interrupt.h>
2306 kebrt 41
#include <arch/machine.h>
2282 jancik 42
#include <arch/mm/page_fault.h>
3135 jermar 43
#include <arch/barrier.h>
2284 stepan 44
#include <print.h>
2286 stepan 45
#include <syscall/syscall.h>
2179 stepan 46
 
2407 stepan 47
/** Offset used in calculation of exception handler's relative address.
48
 *
49
 * @see install_handler()
50
 */
51
#define PREFETCH_OFFSET      0x8
2329 kebrt 52
 
2407 stepan 53
/** LDR instruction's code */
2306 kebrt 54
#define LDR_OPCODE           0xe59ff000
2179 stepan 55
 
2407 stepan 56
/** Number of exception vectors. */
57
#define EXC_VECTORS          8
2329 kebrt 58
 
2407 stepan 59
/** Size of memory block occupied by exception vectors. */
60
#define EXC_VECTORS_SIZE     (EXC_VECTORS * 4)
61
 
2355 stepan 62
/** Switches to kernel stack and saves all registers there.
63
 *
64
 * Temporary exception stack is used to save a few registers
65
 * before stack switch takes place.
66
 */
2284 stepan 67
inline static void setup_stack_and_save_regs()
68
{
2464 jermar 69
    asm volatile(
70
        "ldr r13, =exc_stack        \n"
71
        "stmfd r13!, {r0}       \n"
72
        "mrs r0, spsr           \n"
73
        "and r0, r0, #0x1f      \n"
74
        "cmp r0, #0x10          \n"
75
        "bne 1f             \n"
76
 
77
        /* prev mode was usermode */
78
        "ldmfd r13!, {r0}       \n"
79
        "ldr r13, =supervisor_sp    \n"
80
        "ldr r13, [r13]         \n"
81
        "stmfd r13!, {lr}       \n"
82
        "stmfd r13!, {r0-r12}       \n"
83
        "stmfd r13!, {r13, lr}^     \n"
84
        "mrs r0, spsr           \n"
85
        "stmfd r13!, {r0}       \n"
86
        "b 2f               \n"
87
 
88
        /* mode was not usermode */
89
    "1:\n"
90
        "stmfd r13!, {r1, r2, r3}   \n"
91
        "mrs r1, cpsr           \n"
92
        "mov r2, lr         \n"
93
        "bic r1, r1, #0x1f      \n"
94
        "orr r1, r1, r0         \n"
95
        "mrs r0, cpsr           \n"
96
        "msr cpsr_c, r1         \n"
97
 
98
        "mov r3, r13            \n"
99
        "stmfd r13!, {r2}       \n"
100
        "mov r2, lr         \n"
101
        "stmfd r13!, {r4-r12}       \n"
102
        "mov r1, r13            \n"
103
        /* the following two lines are for debugging */
104
        "mov sp, #0         \n"
105
        "mov lr, #0         \n"
106
        "msr cpsr_c, r0         \n"
107
 
108
        "ldmfd r13!, {r4, r5, r6, r7}   \n"
109
        "stmfd r1!, {r4, r5, r6}    \n"
110
        "stmfd r1!, {r7}        \n"
111
        "stmfd r1!, {r2}        \n"
112
        "stmfd r1!, {r3}        \n"
113
        "mrs r0, spsr           \n"
114
        "stmfd r1!, {r0}        \n"
115
        "mov r13, r1            \n"
116
    "2:\n"
117
    );
2284 stepan 118
}
119
 
2355 stepan 120
/** Returns from exception mode.
121
 *
122
 * Previously saved state of registers (including control register)
123
 * is restored from the stack.
124
 */
2284 stepan 125
inline static void load_regs()
126
{
2464 jermar 127
    asm volatile(
128
        "ldmfd r13!, {r0}       \n"
129
        "msr spsr, r0           \n"
130
        "and r0, r0, #0x1f      \n"
131
        "cmp r0, #0x10          \n"
132
        "bne 1f             \n"
133
 
134
        /* return to user mode */
135
        "ldmfd r13!, {r13, lr}^     \n"
136
        "b 2f               \n"
137
 
138
        /* return to non-user mode */
139
    "1:\n"
140
        "ldmfd r13!, {r1, r2}       \n"
141
        "mrs r3, cpsr           \n"
142
        "bic r3, r3, #0x1f      \n"
143
        "orr r3, r3, r0         \n"
144
        "mrs r0, cpsr           \n"
145
        "msr cpsr_c, r3         \n"
146
 
147
        "mov r13, r1            \n"
148
        "mov lr, r2         \n"
149
        "msr cpsr_c, r0         \n"
150
 
151
        /* actual return */
152
    "2:\n"
153
        "ldmfd r13, {r0-r12, pc}^\n"
154
    );
2284 stepan 155
}
156
 
2411 stepan 157
 
2407 stepan 158
/** Switch CPU to mode in which interrupts are serviced (currently it
159
 * is Undefined mode).
160
 *
161
 * The default mode for interrupt servicing (Interrupt Mode)
162
 * can not be used because of nested interrupts (which can occur
2464 jermar 163
 * because interrupts are enabled in higher levels of interrupt handler).
2407 stepan 164
 */
2414 kebrt 165
inline static void switch_to_irq_servicing_mode()
2407 stepan 166
{
167
    /* switch to Undefined mode */
168
    asm volatile(
169
        /* save regs used during switching */
170
        "stmfd sp!, {r0-r3}     \n"
171
 
172
        /* save stack pointer and link register to r1, r2 */
173
        "mov r1, sp         \n"
174
        "mov r2, lr         \n"
175
 
176
        /* mode switch */
177
        "mrs r0, cpsr           \n"
178
        "bic r0, r0, #0x1f      \n"
179
        "orr r0, r0, #0x1b      \n"
180
        "msr cpsr_c, r0         \n"
181
 
182
        /* restore saved sp and lr */
183
        "mov sp, r1         \n"
184
        "mov lr, r2         \n"
185
 
186
        /* restore original regs */
187
        "ldmfd sp!, {r0-r3}     \n"
188
    );
189
}
190
 
2355 stepan 191
/** Calls exception dispatch routine. */
2235 stepan 192
#define CALL_EXC_DISPATCH(exception)        \
193
    asm("mov r0, %0" : : "i" (exception));  \
2284 stepan 194
    asm("mov r1, r13");         \
2235 stepan 195
    asm("bl exc_dispatch");     
196
 
197
/** General exception handler.
2355 stepan 198
 *
2235 stepan 199
 *  Stores registers, dispatches the exception,
200
 *  and finally restores registers and returns from exception processing.
2329 kebrt 201
 *
202
 *  @param exception Exception number.
2235 stepan 203
 */
204
#define PROCESS_EXCEPTION(exception)        \
2284 stepan 205
    setup_stack_and_save_regs();        \
2235 stepan 206
    CALL_EXC_DISPATCH(exception)        \
2284 stepan 207
    load_regs();
2235 stepan 208
 
209
/** Updates specified exception vector to jump to given handler.
2355 stepan 210
 *
2329 kebrt 211
 *  Addresses of handlers are stored in memory following exception vectors.
2235 stepan 212
 */
3135 jermar 213
static void install_handler(unsigned handler_addr, unsigned *vector)
2235 stepan 214
{
215
    /* relative address (related to exc. vector) of the word
216
     * where handler's address is stored
217
    */
2611 jermar 218
    volatile uint32_t handler_address_ptr = EXC_VECTORS_SIZE -
219
        PREFETCH_OFFSET;
2179 stepan 220
 
2235 stepan 221
    /* make it LDR instruction and store at exception vector */
222
    *vector = handler_address_ptr | LDR_OPCODE;
3135 jermar 223
    smc_coherence(*vector);
2179 stepan 224
 
2235 stepan 225
    /* store handler's address */
226
    *(vector + EXC_VECTORS) = handler_addr;
2284 stepan 227
 
2179 stepan 228
}
229
 
2329 kebrt 230
/** Low-level Reset Exception handler. */
3135 jermar 231
static void reset_exception_entry(void)
2235 stepan 232
{
233
    PROCESS_EXCEPTION(EXC_RESET);
2179 stepan 234
}
235
 
2329 kebrt 236
/** Low-level Software Interrupt Exception handler. */
3135 jermar 237
static void swi_exception_entry(void)
2235 stepan 238
{
239
    PROCESS_EXCEPTION(EXC_SWI);
2179 stepan 240
}
241
 
2329 kebrt 242
/** Low-level Undefined Instruction Exception handler. */
3135 jermar 243
static void undef_instr_exception_entry(void)
2235 stepan 244
{
245
    PROCESS_EXCEPTION(EXC_UNDEF_INSTR);
246
}
247
 
2329 kebrt 248
/** Low-level Fast Interrupt Exception handler. */
3135 jermar 249
static void fiq_exception_entry(void)
2235 stepan 250
{
251
    PROCESS_EXCEPTION(EXC_FIQ);
252
}
253
 
2329 kebrt 254
/** Low-level Prefetch Abort Exception handler. */
3135 jermar 255
static void prefetch_abort_exception_entry(void)
2235 stepan 256
{
257
    asm("sub lr, lr, #4");
258
    PROCESS_EXCEPTION(EXC_PREFETCH_ABORT);
259
}
260
 
2329 kebrt 261
/** Low-level Data Abort Exception handler. */
3135 jermar 262
static void data_abort_exception_entry(void)
2235 stepan 263
{
264
    asm("sub lr, lr, #8");
265
    PROCESS_EXCEPTION(EXC_DATA_ABORT);
266
}
267
 
2355 stepan 268
/** Low-level Interrupt Exception handler.
269
 *
270
 * CPU is switched to Undefined mode before further interrupt processing
271
 * because of possible occurence of nested interrupt exception, which
272
 * would overwrite (and thus spoil) stack pointer.
273
 */
3135 jermar 274
static void irq_exception_entry(void)
2235 stepan 275
{
276
    asm("sub lr, lr, #4");
2344 stepan 277
    setup_stack_and_save_regs();
2407 stepan 278
 
2414 kebrt 279
    switch_to_irq_servicing_mode();
2407 stepan 280
 
2344 stepan 281
    CALL_EXC_DISPATCH(EXC_IRQ)
282
 
283
    load_regs();
2235 stepan 284
}
285
 
2286 stepan 286
/** Software Interrupt handler.
287
 *
288
 * Dispatches the syscall.
289
 */
2304 kebrt 290
static void swi_exception(int exc_no, istate_t *istate)
2284 stepan 291
{
2464 jermar 292
    istate->r0 = syscall_handler(istate->r0, istate->r1, istate->r2,
2611 jermar 293
        istate->r3, istate->r4, istate->r5, istate->r6);
2284 stepan 294
}
295
 
2235 stepan 296
/** Interrupt Exception handler.
2286 stepan 297
 *
2464 jermar 298
 * Determines the sources of interrupt and calls their handlers.
2235 stepan 299
 */
2304 kebrt 300
static void irq_exception(int exc_no, istate_t *istate)
2235 stepan 301
{
2306 kebrt 302
    machine_irq_exception(exc_no, istate);
2235 stepan 303
}
304
 
2329 kebrt 305
/** Fills exception vectors with appropriate exception handlers. */
2235 stepan 306
void install_exception_handlers(void)
307
{
2464 jermar 308
    install_handler((unsigned) reset_exception_entry,
309
        (unsigned *) EXC_RESET_VEC);
2235 stepan 310
 
2464 jermar 311
    install_handler((unsigned) undef_instr_exception_entry,
312
        (unsigned *) EXC_UNDEF_INSTR_VEC);
2235 stepan 313
 
2464 jermar 314
    install_handler((unsigned) swi_exception_entry,
315
        (unsigned *) EXC_SWI_VEC);
2235 stepan 316
 
2464 jermar 317
    install_handler((unsigned) prefetch_abort_exception_entry,
318
        (unsigned *) EXC_PREFETCH_ABORT_VEC);
2235 stepan 319
 
2464 jermar 320
    install_handler((unsigned) data_abort_exception_entry,
321
        (unsigned *) EXC_DATA_ABORT_VEC);
2235 stepan 322
 
2464 jermar 323
    install_handler((unsigned) irq_exception_entry,
324
        (unsigned *) EXC_IRQ_VEC);
2235 stepan 325
 
326
    install_handler((unsigned)fiq_exception_entry,
2464 jermar 327
        (unsigned *) EXC_FIQ_VEC);
2179 stepan 328
}
329
 
2284 stepan 330
#ifdef HIGH_EXCEPTION_VECTORS
2329 kebrt 331
/** Activates use of high exception vectors addresses. */
2464 jermar 332
static void high_vectors(void)
2262 stepan 333
{
334
    uint32_t control_reg;
335
 
2464 jermar 336
    asm volatile("mrc p15, 0, %0, c1, c1" : "=r" (control_reg));
2262 stepan 337
 
2464 jermar 338
    /* switch on the high vectors bit */
2262 stepan 339
    control_reg |= CP15_R1_HIGH_VECTORS_BIT;
340
 
2464 jermar 341
    asm volatile("mcr p15, 0, %0, c1, c1" : : "r" (control_reg));
2262 stepan 342
}
2284 stepan 343
#endif
2262 stepan 344
 
2245 stepan 345
/** Initializes exception handling.
346
 *
347
 * Installs low-level exception handlers and then registers
348
 * exceptions and their handlers to kernel exception dispatcher.
349
 */
2235 stepan 350
void exception_init(void)
351
{
2262 stepan 352
#ifdef HIGH_EXCEPTION_VECTORS
353
    high_vectors();
354
#endif
2245 stepan 355
    install_exception_handlers();
356
 
2235 stepan 357
    exc_register(EXC_IRQ, "interrupt", (iroutine) irq_exception);
2464 jermar 358
    exc_register(EXC_PREFETCH_ABORT, "prefetch abort",
359
        (iroutine) prefetch_abort);
2277 jancik 360
    exc_register(EXC_DATA_ABORT, "data abort", (iroutine) data_abort);
2284 stepan 361
    exc_register(EXC_SWI, "software interrupt", (iroutine) swi_exception);
2179 stepan 362
}
363
 
2326 kebrt 364
/** Prints #istate_t structure content.
365
 *
366
 * @param istate Structure to be printed.
367
 */
2304 kebrt 368
void print_istate(istate_t *istate)
369
{
370
    dprintf("istate dump:\n");
371
 
372
    dprintf(" r0: %x    r1: %x    r2: %x    r3: %x\n",
2464 jermar 373
        istate->r0, istate->r1, istate->r2, istate->r3);
2304 kebrt 374
    dprintf(" r4: %x    r5: %x    r6: %x    r7: %x\n",
2464 jermar 375
        istate->r4, istate->r5, istate->r6, istate->r7);
2304 kebrt 376
    dprintf(" r8: %x    r8: %x   r10: %x   r11: %x\n",
2464 jermar 377
        istate->r8, istate->r9, istate->r10, istate->r11);
2304 kebrt 378
    dprintf(" r12: %x    sp: %x    lr: %x  spsr: %x\n",
2464 jermar 379
        istate->r12, istate->sp, istate->lr, istate->spsr);
2304 kebrt 380
 
381
    dprintf(" pc: %x\n", istate->pc);
382
}
383
 
2179 stepan 384
/** @}
385
 */