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684 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2006 Jakub Jermar
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 * Copyright (c) 2006 Jakub Vana
684 jermar 4
 * All rights reserved.
5
 *
6
 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
10
 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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3940 decky 30
/** @addtogroup ia64mm
1702 cejka 31
 * @{
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 */
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/** @file
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 */
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684 jermar 36
#include <arch/mm/page.h>
747 jermar 37
#include <genarch/mm/page_ht.h>
38
#include <mm/asid.h>
749 jermar 39
#include <arch/mm/asid.h>
1210 vana 40
#include <arch/mm/vhpt.h>
716 vana 41
#include <arch/types.h>
728 vana 42
#include <print.h>
684 jermar 43
#include <mm/page.h>
747 jermar 44
#include <mm/frame.h>
684 jermar 45
#include <config.h>
46
#include <panic.h>
746 jermar 47
#include <arch/asm.h>
747 jermar 48
#include <arch/barrier.h>
748 jermar 49
#include <memstr.h>
3578 vana 50
#include <align.h>
684 jermar 51
 
792 jermar 52
static void set_environment(void);
749 jermar 53
 
54
/** Initialize ia64 virtual address translation subsystem. */
55
void page_arch_init(void)
56
{
793 jermar 57
    page_mapping_operations = &ht_mapping_operations;
749 jermar 58
    pk_disable();
792 jermar 59
    set_environment();
749 jermar 60
}
61
 
747 jermar 62
/** Initialize VHPT and region registers. */
792 jermar 63
void set_environment(void)
716 vana 64
{
747 jermar 65
    region_register rr;
3973 decky 66
    pta_register pta;
747 jermar 67
    int i;
3973 decky 68
#ifdef CONFIG_VHPT
1780 jermar 69
    uintptr_t vhpt_base;
1210 vana 70
#endif
869 vana 71
 
747 jermar 72
    /*
73
     * First set up kernel region register.
901 jermar 74
     * This is redundant (see start.S) but we keep it here just for sure.
747 jermar 75
     */
76
    rr.word = rr_read(VRN_KERNEL);
77
    rr.map.ve = 0;                  /* disable VHPT walker */
78
    rr.map.ps = PAGE_WIDTH;
901 jermar 79
    rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);
747 jermar 80
    rr_write(VRN_KERNEL, rr.word);
81
    srlz_i();
82
    srlz_d();
901 jermar 83
 
747 jermar 84
    /*
902 jermar 85
     * And setup the rest of region register.
747 jermar 86
     */
87
    for(i = 0; i < REGION_REGISTERS; i++) {
88
        /* skip kernel rr */
89
        if (i == VRN_KERNEL)
90
            continue;
728 vana 91
 
904 jermar 92
        rr.word = rr_read(i);
748 jermar 93
        rr.map.ve = 0;      /* disable VHPT walker */
902 jermar 94
        rr.map.rid = RID_KERNEL;
95
        rr.map.ps = PAGE_WIDTH;
747 jermar 96
        rr_write(i, rr.word);
97
        srlz_i();
98
        srlz_d();
99
    }
726 jermar 100
 
1210 vana 101
#ifdef CONFIG_VHPT  
102
    vhpt_base = vhpt_set_up();
103
#endif
715 vana 104
    /*
747 jermar 105
     * Set up PTA register.
106
     */
107
    pta.word = pta_read();
1210 vana 108
#ifndef CONFIG_VHPT
747 jermar 109
    pta.map.ve = 0;                   /* disable VHPT walker */
1210 vana 110
    pta.map.base = 0 >> PTA_BASE_SHIFT;
111
#else
112
    pta.map.ve = 1;                   /* enable VHPT walker */
113
    pta.map.base = vhpt_base >> PTA_BASE_SHIFT;
114
#endif
747 jermar 115
    pta.map.vf = 1;                   /* large entry format */
116
    pta.map.size = VHPT_WIDTH;
117
    pta_write(pta.word);
118
    srlz_i();
119
    srlz_d();
120
}
728 vana 121
 
748 jermar 122
/** Calculate address of collision chain from VPN and ASID.
123
 *
749 jermar 124
 * Interrupts must be disabled.
748 jermar 125
 *
3766 jermar 126
 * @param page      Address of virtual page including VRN bits.
127
 * @param asid      Address space identifier.
748 jermar 128
 *
3766 jermar 129
 * @return      VHPT entry address.
748 jermar 130
 */
1780 jermar 131
vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid)
748 jermar 132
{
133
    region_register rr_save, rr;
4490 decky 134
    size_t vrn;
749 jermar 135
    rid_t rid;
792 jermar 136
    vhpt_entry_t *v;
748 jermar 137
 
749 jermar 138
    vrn = page >> VRN_SHIFT;
139
    rid = ASID2RID(asid, vrn);
140
 
141
    rr_save.word = rr_read(vrn);
142
    if (rr_save.map.rid == rid) {
143
        /*
144
         * The RID is already in place, compute thash and return.
145
         */
792 jermar 146
        v = (vhpt_entry_t *) thash(page);
147
        return v;
749 jermar 148
    }
149
 
150
    /*
151
     * The RID must be written to some region register.
152
     * To speed things up, register indexed by vrn is used.
153
     */
748 jermar 154
    rr.word = rr_save.word;
749 jermar 155
    rr.map.rid = rid;
156
    rr_write(vrn, rr.word);
748 jermar 157
    srlz_i();
792 jermar 158
    v = (vhpt_entry_t *) thash(page);
749 jermar 159
    rr_write(vrn, rr_save.word);
748 jermar 160
    srlz_i();
161
    srlz_d();
162
 
792 jermar 163
    return v;
748 jermar 164
}
749 jermar 165
 
166
/** Compare ASID and VPN against PTE.
167
 *
168
 * Interrupts must be disabled.
169
 *
3766 jermar 170
 * @param page      Address of virtual page including VRN bits.
171
 * @param asid      Address space identifier.
749 jermar 172
 *
3766 jermar 173
 * @return      True if page and asid match the page and asid of t,
174
 *          false otherwise.
749 jermar 175
 */
1780 jermar 176
bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v)
749 jermar 177
{
178
    region_register rr_save, rr;   
4490 decky 179
    size_t vrn;
749 jermar 180
    rid_t rid;
181
    bool match;
182
 
792 jermar 183
    ASSERT(v);
749 jermar 184
 
185
    vrn = page >> VRN_SHIFT;
186
    rid = ASID2RID(asid, vrn);
187
 
188
    rr_save.word = rr_read(vrn);
189
    if (rr_save.map.rid == rid) {
190
        /*
191
         * The RID is already in place, compare ttag with t and return.
192
         */
792 jermar 193
        return ttag(page) == v->present.tag.tag_word;
749 jermar 194
    }
195
 
196
    /*
197
     * The RID must be written to some region register.
198
     * To speed things up, register indexed by vrn is used.
199
     */
200
    rr.word = rr_save.word;
201
    rr.map.rid = rid;
202
    rr_write(vrn, rr.word);
203
    srlz_i();
792 jermar 204
    match = (ttag(page) == v->present.tag.tag_word);
749 jermar 205
    rr_write(vrn, rr_save.word);
206
    srlz_i();
207
    srlz_d();
208
 
209
    return match;      
210
}
211
 
212
/** Set up one VHPT entry.
213
 *
1708 jermar 214
 * @param v VHPT entry to be set up.
3766 jermar 215
 * @param page      Virtual address of the page mapped by the entry.
216
 * @param asid      Address space identifier of the address space to which
217
 *          page belongs.
218
 * @param frame     Physical address of the frame to wich page is mapped.
219
 * @param flags     Different flags for the mapping.
749 jermar 220
 */
3766 jermar 221
void
222
vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame,
223
    int flags)
749 jermar 224
{
225
    region_register rr_save, rr;   
4490 decky 226
    size_t vrn;
749 jermar 227
    rid_t rid;
1780 jermar 228
    uint64_t tag;
749 jermar 229
 
792 jermar 230
    ASSERT(v);
749 jermar 231
 
232
    vrn = page >> VRN_SHIFT;
233
    rid = ASID2RID(asid, vrn);
234
 
235
    /*
236
     * Compute ttag.
237
     */
238
    rr_save.word = rr_read(vrn);
239
    rr.word = rr_save.word;
240
    rr.map.rid = rid;
241
    rr_write(vrn, rr.word);
242
    srlz_i();
243
    tag = ttag(page);
244
    rr_write(vrn, rr_save.word);
245
    srlz_i();
246
    srlz_d();
247
 
248
    /*
249
     * Clear the entry.
250
     */
792 jermar 251
    v->word[0] = 0;
252
    v->word[1] = 0;
253
    v->word[2] = 0;
254
    v->word[3] = 0;
749 jermar 255
 
792 jermar 256
    v->present.p = true;
3766 jermar 257
    v->present.ma = (flags & PAGE_CACHEABLE) ?
258
        MA_WRITEBACK : MA_UNCACHEABLE;
792 jermar 259
    v->present.a = false;   /* not accessed */
260
    v->present.d = false;   /* not dirty */
261
    v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
262
    v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
263
    v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
264
    v->present.ppn = frame >> PPN_SHIFT;
265
    v->present.ed = false;  /* exception not deffered */
266
    v->present.ps = PAGE_WIDTH;
267
    v->present.key = 0;
268
    v->present.tag.tag_word = tag;
749 jermar 269
}
1702 cejka 270
 
3777 jermar 271
uintptr_t hw_map(uintptr_t physaddr, size_t size __attribute__ ((unused)))
3578 vana 272
{
3971 vana 273
    /* THIS is a dirty hack. */
274
    return (uintptr_t)((uint64_t)(PA2KA(physaddr)) + VIO_OFFSET);
3578 vana 275
}
276
 
1888 jermar 277
/** @}
1702 cejka 278
 */