Subversion Repositories HelenOS

Rev

Rev 2071 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
864 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2006 Jakub Jermar
864 jermar 3
 * All rights reserved.
4
 *
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
7
 * are met:
8
 *
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
28
 
1703 jermar 29
/** @addtogroup sparc64interrupt
1702 cejka 30
 * @{
31
 */
864 jermar 32
/**
1703 jermar 33
 * @file
34
 * @brief This file contains fast MMU trap handlers.
864 jermar 35
 */
36
 
1859 jermar 37
#ifndef KERN_sparc64_MMU_TRAP_H_
38
#define KERN_sparc64_MMU_TRAP_H_
864 jermar 39
 
883 jermar 40
#include <arch/stack.h>
1852 jermar 41
#include <arch/regdef.h>
1851 jermar 42
#include <arch/mm/tlb.h>
43
#include <arch/mm/mmu.h>
44
#include <arch/mm/tte.h>
1860 jermar 45
#include <arch/trap/regwin.h>
883 jermar 46
 
1891 jermar 47
#ifdef CONFIG_TSB
48
#include <arch/mm/tsb.h>
49
#endif
50
 
864 jermar 51
#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64
52
#define TT_FAST_DATA_ACCESS_MMU_MISS        0x68
53
#define TT_FAST_DATA_ACCESS_PROTECTION      0x6c
54
 
55
#define FAST_MMU_HANDLER_SIZE           128
56
 
867 jermar 57
#ifdef __ASM__
1860 jermar 58
 
864 jermar 59
.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
1861 jermar 60
    /*
61
     * First, try to refill TLB from TSB.
62
     */
1891 jermar 63
#ifdef CONFIG_TSB
64
    ldxa [%g0] ASI_IMMU, %g1            ! read TSB Tag Target Register
65
    ldxa [%g0] ASI_IMMU_TSB_8KB_PTR_REG, %g2    ! read TSB 8K Pointer
66
    ldda [%g2] ASI_NUCLEUS_QUAD_LDD, %g4        ! 16-byte atomic load into %g4 and %g5
67
    cmp %g1, %g4                    ! is this the entry we are looking for?
68
    bne,pn %xcc, 0f
69
    nop
70
    stxa %g5, [%g0] ASI_ITLB_DATA_IN_REG        ! copy mapping from ITSB to ITLB
71
    retry
72
#endif
73
 
74
0:
1859 jermar 75
    wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
76
    PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss
864 jermar 77
.endm
78
 
1870 jermar 79
.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl
1851 jermar 80
    /*
1852 jermar 81
     * First, try to refill TLB from TSB.
82
     */
83
 
1891 jermar 84
#ifdef CONFIG_TSB
85
    ldxa [%g0] ASI_DMMU, %g1            ! read TSB Tag Target Register
1954 jermar 86
    srlx %g1, TSB_TAG_TARGET_CONTEXT_SHIFT, %g2 ! is this a kernel miss?
1891 jermar 87
    brz,pn %g2, 0f
88
    ldxa [%g0] ASI_DMMU_TSB_8KB_PTR_REG, %g3    ! read TSB 8K Pointer
89
    ldda [%g3] ASI_NUCLEUS_QUAD_LDD, %g4        ! 16-byte atomic load into %g4 and %g5
90
    cmp %g1, %g4                    ! is this the entry we are looking for?
91
    bne,pn %xcc, 0f
92
    nop
93
    stxa %g5, [%g0] ASI_DTLB_DATA_IN_REG        ! copy mapping from DTSB to DTLB
94
    retry
95
#endif
96
 
1852 jermar 97
    /*
98
     * Second, test if it is the portion of the kernel address space
1851 jermar 99
     * which is faulting. If that is the case, immediately create
100
     * identity mapping for that page in DTLB. VPN 0 is excluded from
101
     * this treatment.
102
     *
103
     * Note that branch-delay slots are used in order to save space.
104
     */
1891 jermar 105
0:
1851 jermar 106
    mov VA_DMMU_TAG_ACCESS, %g1
107
    ldxa [%g1] ASI_DMMU, %g1            ! read the faulting Context and VPN
108
    set TLB_TAG_ACCESS_CONTEXT_MASK, %g2
109
    andcc %g1, %g2, %g3             ! get Context
110
    bnz 0f                      ! Context is non-zero
111
    andncc %g1, %g2, %g3                ! get page address into %g3
112
    bz 0f                       ! page address is zero
113
 
1978 jermar 114
    sethi %hi(kernel_8k_tlb_data_template), %g2
115
    ldx [%g2 + %lo(kernel_8k_tlb_data_template)], %g2
116
    or %g3, %g2, %g2
1851 jermar 117
    stxa %g2, [%g0] ASI_DTLB_DATA_IN_REG        ! identity map the kernel page
864 jermar 118
    retry
1851 jermar 119
 
1852 jermar 120
    /*
121
     * Third, catch and handle special cases when the trap is caused by
1860 jermar 122
     * the userspace register window spill or fill handler. In case
123
     * one of these two traps caused this trap, we just lower the trap
124
     * level and service the DTLB miss. In the end, we restart
125
     * the offending SAVE or RESTORE.
1852 jermar 126
     */
1851 jermar 127
0:
1870 jermar 128
.if (\tl > 0)
129
    wrpr %g0, 1, %tl
130
.endif
1852 jermar 131
 
132
    wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
1851 jermar 133
    PREEMPTIBLE_HANDLER fast_data_access_mmu_miss
864 jermar 134
.endm
135
 
1870 jermar 136
.macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl
1860 jermar 137
    /*
1891 jermar 138
     * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER.
1860 jermar 139
     */
140
 
1870 jermar 141
.if (\tl > 0)
142
    wrpr %g0, 1, %tl
143
.endif
1860 jermar 144
 
1859 jermar 145
    wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
146
    PREEMPTIBLE_HANDLER fast_data_access_protection
864 jermar 147
.endm
1860 jermar 148
 
867 jermar 149
#endif /* __ASM__ */
864 jermar 150
 
151
#endif
1702 cejka 152
 
1703 jermar 153
/** @}
1702 cejka 154
 */