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| Rev | Author | Line No. | Line |
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| 418 | jermar | 1 | /* |
| 2071 | jermar | 2 | * Copyright (c) 2005 Jakub Jermar |
| 418 | jermar | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 1784 | jermar | 29 | /** @addtogroup sparc64 |
| 1702 | cejka | 30 | * @{ |
| 31 | */ |
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| 32 | /** @file |
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| 33 | */ |
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| 34 | |||
| 1860 | jermar | 35 | #ifndef KERN_sparc64_ATOMIC_H_ |
| 36 | #define KERN_sparc64_ATOMIC_H_ |
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| 418 | jermar | 37 | |
| 1902 | jermar | 38 | #include <arch/barrier.h> |
| 475 | jermar | 39 | #include <arch/types.h> |
| 3379 | jermar | 40 | #include <preemption.h> |
| 475 | jermar | 41 | |
| 861 | jermar | 42 | /** Atomic add operation. |
| 43 | * |
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| 44 | * Use atomic compare and swap operation to atomically add signed value. |
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| 45 | * |
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| 46 | * @param val Atomic variable. |
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| 47 | * @param i Signed value to be added. |
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| 48 | * |
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| 49 | * @return Value of the atomic variable as it existed before addition. |
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| 418 | jermar | 50 | */ |
| 1104 | jermar | 51 | static inline long atomic_add(atomic_t *val, int i) |
| 861 | jermar | 52 | { |
| 1780 | jermar | 53 | uint64_t a, b; |
| 418 | jermar | 54 | |
| 1888 | jermar | 55 | do { |
| 56 | volatile uintptr_t x = (uint64_t) &val->count; |
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| 861 | jermar | 57 | |
| 1888 | jermar | 58 | a = *((uint64_t *) x); |
| 59 | b = a + i; |
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| 3379 | jermar | 60 | asm volatile ("casx %0, %2, %1\n" : "+m" (*((uint64_t *)x)), |
| 61 | "+r" (b) : "r" (a)); |
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| 1888 | jermar | 62 | } while (a != b); |
| 63 | |||
| 861 | jermar | 64 | return a; |
| 65 | } |
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| 66 | |||
| 1104 | jermar | 67 | static inline long atomic_preinc(atomic_t *val) |
| 1024 | jermar | 68 | { |
| 69 | return atomic_add(val, 1) + 1; |
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| 70 | } |
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| 71 | |||
| 1104 | jermar | 72 | static inline long atomic_postinc(atomic_t *val) |
| 1024 | jermar | 73 | { |
| 74 | return atomic_add(val, 1); |
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| 75 | } |
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| 76 | |||
| 1104 | jermar | 77 | static inline long atomic_predec(atomic_t *val) |
| 1024 | jermar | 78 | { |
| 79 | return atomic_add(val, -1) - 1; |
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| 80 | } |
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| 81 | |||
| 1104 | jermar | 82 | static inline long atomic_postdec(atomic_t *val) |
| 1024 | jermar | 83 | { |
| 1082 | jermar | 84 | return atomic_add(val, -1); |
| 1024 | jermar | 85 | } |
| 86 | |||
| 627 | jermar | 87 | static inline void atomic_inc(atomic_t *val) |
| 88 | { |
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| 861 | jermar | 89 | (void) atomic_add(val, 1); |
| 418 | jermar | 90 | } |
| 91 | |||
| 627 | jermar | 92 | static inline void atomic_dec(atomic_t *val) |
| 93 | { |
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| 861 | jermar | 94 | (void) atomic_add(val, -1); |
| 418 | jermar | 95 | } |
| 96 | |||
| 1902 | jermar | 97 | static inline long test_and_set(atomic_t *val) |
| 98 | { |
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| 99 | uint64_t v = 1; |
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| 1903 | jermar | 100 | volatile uintptr_t x = (uint64_t) &val->count; |
| 1902 | jermar | 101 | |
| 3379 | jermar | 102 | asm volatile ("casx %0, %2, %1\n" : "+m" (*((uint64_t *) x)), |
| 103 | "+r" (v) : "r" (0)); |
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| 1902 | jermar | 104 | |
| 105 | return v; |
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| 106 | } |
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| 107 | |||
| 108 | static inline void atomic_lock_arch(atomic_t *val) |
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| 109 | { |
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| 110 | uint64_t tmp1 = 1; |
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| 2129 | jermar | 111 | uint64_t tmp2 = 0; |
| 1902 | jermar | 112 | |
| 1903 | jermar | 113 | volatile uintptr_t x = (uint64_t) &val->count; |
| 114 | |||
| 3379 | jermar | 115 | preemption_disable(); |
| 116 | |||
| 2082 | decky | 117 | asm volatile ( |
| 1902 | jermar | 118 | "0:\n" |
| 119 | "casx %0, %3, %1\n" |
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| 120 | "brz %1, 2f\n" |
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| 121 | "nop\n" |
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| 122 | "1:\n" |
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| 123 | "ldx %0, %2\n" |
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| 124 | "brz %2, 0b\n" |
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| 125 | "nop\n" |
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| 126 | "ba 1b\n" |
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| 127 | "nop\n" |
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| 128 | "2:\n" |
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| 1903 | jermar | 129 | : "+m" (*((uint64_t *) x)), "+r" (tmp1), "+r" (tmp2) : "r" (0) |
| 1902 | jermar | 130 | ); |
| 131 | |||
| 132 | /* |
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| 133 | * Prevent critical section code from bleeding out this way up. |
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| 134 | */ |
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| 135 | CS_ENTER_BARRIER(); |
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| 136 | } |
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| 137 | |||
| 418 | jermar | 138 | #endif |
| 1702 | cejka | 139 | |
| 1784 | jermar | 140 | /** @} |
| 1702 | cejka | 141 | */ |