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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 162 | decky | 1 | # |
| 2 | # Copyright (C) 2005 Martin Decky |
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| 3 | # All rights reserved. |
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| 4 | # |
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| 5 | # Redistribution and use in source and binary forms, with or without |
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| 6 | # modification, are permitted provided that the following conditions |
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| 7 | # are met: |
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| 8 | # |
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| 9 | # - Redistributions of source code must retain the above copyright |
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| 10 | # notice, this list of conditions and the following disclaimer. |
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| 11 | # - Redistributions in binary form must reproduce the above copyright |
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| 12 | # notice, this list of conditions and the following disclaimer in the |
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| 13 | # documentation and/or other materials provided with the distribution. |
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| 14 | # - The name of the author may not be used to endorse or promote products |
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| 15 | # derived from this software without specific prior written permission. |
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| 16 | # |
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| 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | # |
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| 28 | |||
| 191 | decky | 29 | #include <arch/asm/macro.h> |
| 30 | |||
| 162 | decky | 31 | .text |
| 32 | |||
| 33 | .global cpu_halt |
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| 185 | decky | 34 | .global cpu_sleep |
| 210 | decky | 35 | .global memsetb |
| 36 | .global memcpy |
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| 185 | decky | 37 | |
| 162 | decky | 38 | cpu_halt: |
| 39 | b cpu_halt |
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| 185 | decky | 40 | |
| 41 | cpu_sleep: |
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| 42 | b cpu_sleep |
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| 210 | decky | 43 | |
| 44 | memsetb: |
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| 45 | rlwimi r5, r5, 8, 16, 23 |
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| 46 | rlwimi r5, r5, 16, 0, 15 |
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| 47 | |||
| 48 | addi r14, r3, -4 |
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| 49 | |||
| 50 | cmplwi 0, r4, 4 |
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| 51 | blt 7f |
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| 52 | |||
| 53 | stwu r5, 4(r14) |
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| 54 | beqlr |
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| 55 | |||
| 56 | andi. r15, r14, 3 |
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| 57 | add r4, r15, r4 |
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| 58 | subf r14, r15, r14 |
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| 59 | srwi r15, r4, 2 |
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| 60 | mtctr r15 |
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| 61 | |||
| 62 | bdz 6f |
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| 63 | |||
| 64 | 1: |
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| 65 | stwu r5, 4(r14) |
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| 66 | bdnz 1b |
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| 67 | |||
| 68 | 6: |
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| 69 | |||
| 70 | andi. r4, r4, 3 |
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| 71 | |||
| 72 | 7: |
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| 73 | |||
| 74 | cmpwi 0, r4, 0 |
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| 75 | beqlr |
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| 76 | |||
| 77 | mtctr r4 |
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| 78 | addi r6, r6, 3 |
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| 79 | |||
| 80 | 8: |
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| 81 | |||
| 82 | stbu r5, 1(r14) |
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| 83 | bdnz 8b |
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| 84 | |||
| 85 | blr |
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| 86 | |||
| 87 | memcpy: |
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| 88 | # TODO |
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| 89 | blr |