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1 | jermar | 1 | /* |
112 | jermar | 2 | * Copyright (C) 2005 Ondrej Palkovsky |
1 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
341 | jermar | 29 | #ifndef __mips32_ATOMIC_H__ |
30 | #define __mips32_ATOMIC_H__ |
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1 | jermar | 31 | |
475 | jermar | 32 | #include <arch/types.h> |
33 | |||
111 | palkovsky | 34 | #define atomic_inc(x) (a_add(x,1)) |
35 | #define atomic_dec(x) (a_sub(x,1)) |
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1 | jermar | 36 | |
475 | jermar | 37 | typedef volatile __u32 atomic_t; |
38 | |||
111 | palkovsky | 39 | /* |
40 | * Atomic addition |
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41 | * |
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42 | * This case is harder, and we have to use the special LL and SC operations |
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43 | * to achieve atomicity. The instructions are similar to LW (load) and SW |
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44 | * (store), except that the LL (load-linked) instruction loads the address |
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45 | * of the variable to a special register and if another process writes to |
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46 | * the same location, the SC (store-conditional) instruction fails. |
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47 | */ |
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475 | jermar | 48 | static inline atomic_t a_add(atomic_t *val, int i) |
111 | palkovsky | 49 | { |
475 | jermar | 50 | atomic_t tmp, tmp2; |
111 | palkovsky | 51 | |
52 | asm volatile ( |
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53 | " .set push\n" |
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54 | " .set noreorder\n" |
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55 | " nop\n" |
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56 | "1:\n" |
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57 | " ll %0, %1\n" |
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240 | palkovsky | 58 | " addu %0, %0, %3\n" |
59 | " move %2, %0\n" |
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111 | palkovsky | 60 | " sc %0, %1\n" |
61 | " beq %0, 0x0, 1b\n" |
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240 | palkovsky | 62 | " move %0, %2\n" |
111 | palkovsky | 63 | " .set pop\n" |
240 | palkovsky | 64 | : "=&r" (tmp), "=o" (*val), "=r" (tmp2) |
65 | : "r" (i) |
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111 | palkovsky | 66 | ); |
67 | return tmp; |
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68 | } |
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69 | |||
70 | |||
71 | /* |
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72 | * Atomic subtraction |
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73 | * |
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74 | * Implemented in the same manner as a_add, except we substract the value. |
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75 | */ |
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475 | jermar | 76 | static inline atomic_t a_sub(atomic_t *val, int i) |
111 | palkovsky | 77 | |
78 | { |
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475 | jermar | 79 | atomic_t tmp, tmp2; |
111 | palkovsky | 80 | |
81 | asm volatile ( |
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82 | " .set push\n" |
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83 | " .set noreorder\n" |
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84 | " nop\n" |
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85 | "1:\n" |
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86 | " ll %0, %1\n" |
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240 | palkovsky | 87 | " subu %0, %0, %3\n" |
88 | " move %2, %0\n" |
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111 | palkovsky | 89 | " sc %0, %1\n" |
90 | " beq %0, 0x0, 1b\n" |
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240 | palkovsky | 91 | " move %0, %2\n" |
111 | palkovsky | 92 | " .set pop\n" |
240 | palkovsky | 93 | : "=&r" (tmp), "=o" (*val), "=r" (tmp2) |
94 | : "r" (i) |
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111 | palkovsky | 95 | ); |
96 | return tmp; |
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97 | } |
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98 | |||
99 | |||
1 | jermar | 100 | #endif |