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/*
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 * Copyright (c) 2005 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup ia64
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 * @{
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 */
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/** @file
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 */
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#ifndef KERN_ia64_CPU_H_
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#define KERN_ia64_CPU_H_
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#include <arch/types.h>
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#include <arch/register.h>
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#include <arch/asm.h>
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#define FAMILY_ITANIUM  0x7
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#define FAMILY_ITANIUM2 0x1f
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typedef struct {
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    uint64_t cpuid0;
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    uint64_t cpuid1;
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    cpuid3_t cpuid3;
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} cpu_arch_t;
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/** Read CPUID register.
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 *
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 * @param n CPUID register number.
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 *
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 * @return Value of CPUID[n] register.
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 */
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static inline uint64_t cpuid_read(int n)
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{
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    uint64_t v;
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    asm volatile ("mov %0 = cpuid[%1]\n" : "=r" (v) : "r" (n));
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    return v;
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}
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#endif
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/** @}
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 */