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| 1 | jermar | 1 | /* |
| 2 | * Copyright (C) 2001-2004 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 11 | jermar | 29 | #ifndef __ia32_ATOMIC_H__ |
| 30 | #define __ia32_ATOMIC_H__ |
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| 1 | jermar | 31 | |
| 32 | #include <arch/types.h> |
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| 1100 | palkovsky | 33 | #include <arch/barrier.h> |
| 34 | #include <preemption.h> |
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| 1104 | jermar | 35 | #include <typedefs.h> |
| 1 | jermar | 36 | |
| 475 | jermar | 37 | static inline void atomic_inc(atomic_t *val) { |
| 458 | decky | 38 | #ifdef CONFIG_SMP |
| 625 | palkovsky | 39 | __asm__ volatile ("lock incl %0\n" : "=m" (val->count)); |
| 115 | jermar | 40 | #else |
| 625 | palkovsky | 41 | __asm__ volatile ("incl %0\n" : "=m" (val->count)); |
| 458 | decky | 42 | #endif /* CONFIG_SMP */ |
| 115 | jermar | 43 | } |
| 1 | jermar | 44 | |
| 475 | jermar | 45 | static inline void atomic_dec(atomic_t *val) { |
| 458 | decky | 46 | #ifdef CONFIG_SMP |
| 625 | palkovsky | 47 | __asm__ volatile ("lock decl %0\n" : "=m" (val->count)); |
| 115 | jermar | 48 | #else |
| 625 | palkovsky | 49 | __asm__ volatile ("decl %0\n" : "=m" (val->count)); |
| 458 | decky | 50 | #endif /* CONFIG_SMP */ |
| 115 | jermar | 51 | } |
| 52 | |||
| 1104 | jermar | 53 | static inline long atomic_postinc(atomic_t *val) |
| 477 | vana | 54 | { |
| 1691 | palkovsky | 55 | long r = 1; |
| 627 | jermar | 56 | |
| 477 | vana | 57 | __asm__ volatile ( |
| 1691 | palkovsky | 58 | "lock xaddl %1, %0\n" |
| 59 | : "=m" (val->count) : "r" (r) |
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| 477 | vana | 60 | ); |
| 627 | jermar | 61 | |
| 477 | vana | 62 | return r; |
| 63 | } |
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| 64 | |||
| 1104 | jermar | 65 | static inline long atomic_postdec(atomic_t *val) |
| 477 | vana | 66 | { |
| 1691 | palkovsky | 67 | long r = -1; |
| 627 | jermar | 68 | |
| 477 | vana | 69 | __asm__ volatile ( |
| 1691 | palkovsky | 70 | "lock xaddl %1, %0\n" |
| 71 | : "=m" (val->count) : "r"(r) |
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| 477 | vana | 72 | ); |
| 627 | jermar | 73 | |
| 477 | vana | 74 | return r; |
| 75 | } |
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| 76 | |||
| 1024 | jermar | 77 | #define atomic_preinc(val) (atomic_postinc(val)+1) |
| 78 | #define atomic_predec(val) (atomic_postdec(val)-1) |
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| 477 | vana | 79 | |
| 633 | palkovsky | 80 | static inline __u32 test_and_set(atomic_t *val) { |
| 81 | __u32 v; |
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| 115 | jermar | 82 | |
| 83 | __asm__ volatile ( |
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| 84 | "movl $1, %0\n" |
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| 259 | palkovsky | 85 | "xchgl %0, %1\n" |
| 625 | palkovsky | 86 | : "=r" (v),"=m" (val->count) |
| 115 | jermar | 87 | ); |
| 88 | |||
| 89 | return v; |
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| 90 | } |
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| 91 | |||
| 1104 | jermar | 92 | /** ia32 specific fast spinlock */ |
| 1100 | palkovsky | 93 | static inline void atomic_lock_arch(atomic_t *val) |
| 94 | { |
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| 95 | __u32 tmp; |
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| 115 | jermar | 96 | |
| 1100 | palkovsky | 97 | preemption_disable(); |
| 98 | __asm__ volatile ( |
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| 99 | "0:;" |
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| 100 | #ifdef CONFIG_HT |
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| 101 | "pause;" /* Pentium 4's HT love this instruction */ |
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| 102 | #endif |
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| 103 | "mov %0, %1;" |
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| 104 | "testl %1, %1;" |
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| 1104 | jermar | 105 | "jnz 0b;" /* Lightweight looping on locked spinlock */ |
| 1100 | palkovsky | 106 | |
| 107 | "incl %1;" /* now use the atomic operation */ |
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| 108 | "xchgl %0, %1;" |
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| 109 | "testl %1, %1;" |
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| 110 | "jnz 0b;" |
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| 111 | : "=m"(val->count),"=r"(tmp) |
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| 112 | ); |
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| 113 | /* |
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| 114 | * Prevent critical section code from bleeding out this way up. |
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| 115 | */ |
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| 116 | CS_ENTER_BARRIER(); |
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| 117 | } |
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| 1 | jermar | 118 | |
| 119 | #endif |