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162 decky 1
#
2071 jermar 2
# Copyright (c) 2005 Martin Decky
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#include <arch/asm/regname.h>
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.text
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1220 decky 33
.global userspace_asm
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.global iret
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.global iret_syscall
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.global memsetb
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.global memcpy
1288 jermar 38
.global memcpy_from_uspace
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.global memcpy_to_uspace
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.global memcpy_from_uspace_failover_address
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.global memcpy_to_uspace_failover_address
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userspace_asm:
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	# r3 = uspace_uarg
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	# r4 = stack
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	# r5 = entry
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	# disable interrupts
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	mfmsr r31
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	rlwinm r31, r31, 0, 17, 15
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	mtmsr r31
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	# set entry point
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57
	mtsrr0 r5
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59
	# set problem state, enable interrupts
60
 
1267 decky 61
	ori r31, r31, msr_pr
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	ori r31, r31, msr_ee
1220 decky 63
	mtsrr1 r31
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65
	# set stack
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67
	mr sp, r4
3168 svoboda 68
 
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	# %r3 is defined to hold pcb_ptr - set it to 0
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71
	xor r3, r3, r3
1220 decky 72
 
73
	# jump to userspace
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75
	rfi
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iret:
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79
	# disable interrupts
80
 
81
	mfmsr r31
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	rlwinm r31, r31, 0, 17, 15
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	mtmsr r31
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1355 decky 85
	lwz r0, 8(sp)
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	lwz r2, 12(sp)
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	lwz r3, 16(sp)
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	lwz r4, 20(sp)
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	lwz r5, 24(sp)
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	lwz r6, 28(sp)
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	lwz r7, 32(sp)
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	lwz r8, 36(sp)
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	lwz r9, 40(sp)
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	lwz r10, 44(sp)
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	lwz r11, 48(sp)
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	lwz r13, 52(sp)
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	lwz r14, 56(sp)
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	lwz r15, 60(sp)
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	lwz r16, 64(sp)
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	lwz r17, 68(sp)
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	lwz r18, 72(sp)
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	lwz r19, 76(sp)
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	lwz r20, 80(sp)
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	lwz r21, 84(sp)
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	lwz r22, 88(sp)
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	lwz r23, 92(sp)
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	lwz r24, 96(sp)
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	lwz r25, 100(sp)
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	lwz r26, 104(sp)
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	lwz r27, 108(sp)
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	lwz r28, 112(sp)
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	lwz r29, 116(sp)
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	lwz r30, 120(sp)
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	lwz r31, 124(sp)
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1355 decky 116
	lwz r12, 128(sp)
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	mtcr r12
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1355 decky 119
	lwz r12, 132(sp)
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	mtsrr0 r12
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1355 decky 122
	lwz r12, 136(sp)
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	mtsrr1 r12
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1355 decky 125
	lwz r12, 140(sp)
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	mtlr r12
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1355 decky 128
	lwz r12, 144(sp)
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	mtctr r12
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1355 decky 131
	lwz r12, 148(sp)
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	mtxer r12
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	lwz r12, 152(sp)
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	lwz sp, 156(sp)
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137
	rfi
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139
iret_syscall:
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	# reset decrementer
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143
	li r31, 1000
144
	mtdec r31
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1277 decky 146
	# disable interrupts
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148
	mfmsr r31
149
	rlwinm r31, r31, 0, 17, 15
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	mtmsr r31
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1355 decky 152
	lwz r0, 8(sp)
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	lwz r2, 12(sp)
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	lwz r4, 20(sp)
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	lwz r5, 24(sp)
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	lwz r6, 28(sp)
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	lwz r7, 32(sp)
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	lwz r8, 36(sp)
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	lwz r9, 40(sp)
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	lwz r10, 44(sp)
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	lwz r11, 48(sp)
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	lwz r13, 52(sp)
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	lwz r14, 56(sp)
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	lwz r15, 60(sp)
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	lwz r16, 64(sp)
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	lwz r17, 68(sp)
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	lwz r18, 72(sp)
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	lwz r19, 76(sp)
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	lwz r20, 80(sp)
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	lwz r21, 84(sp)
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	lwz r22, 88(sp)
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	lwz r23, 92(sp)
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	lwz r24, 96(sp)
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	lwz r25, 100(sp)
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	lwz r26, 104(sp)
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	lwz r27, 108(sp)
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	lwz r28, 112(sp)
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	lwz r29, 116(sp)
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	lwz r30, 120(sp)
180
	lwz r31, 124(sp)
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1355 decky 182
	lwz r12, 128(sp)
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	mtcr r12
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	lwz r12, 132(sp)
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	mtsrr0 r12
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	lwz r12, 136(sp)
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	mtsrr1 r12
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	lwz r12, 140(sp)
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	mtlr r12
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	lwz r12, 144(sp)
1267 decky 195
	mtctr r12
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	lwz r12, 148(sp)
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	mtxer r12
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	lwz r12, 152(sp)
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	lwz sp, 156(sp)
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1004 decky 203
	rfi
204
 
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memsetb:
206
	rlwimi r5, r5, 8, 16, 23
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	rlwimi r5, r5, 16, 0, 15
208
 
209
	addi r14, r3, -4
210
 
211
	cmplwi 0, r4, 4
212
	blt 7f
213
 
214
	stwu r5, 4(r14)
215
	beqlr
216
 
217
	andi. r15, r14, 3
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	add r4, r15, r4
219
	subf r14, r15, r14
220
	srwi r15, r4, 2
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	mtctr r15
222
 
223
	bdz 6f
224
 
225
	1:
226
		stwu r5, 4(r14)
227
		bdnz 1b
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229
	6:
230
 
231
	andi. r4, r4, 3
232
 
233
	7:
234
 
235
	cmpwi 0, r4, 0
236
	beqlr
237
 
238
	mtctr r4
239
	addi r6, r6, 3
240
 
241
	8:
242
 
243
	stbu r5, 1(r14)
244
	bdnz 8b
245
 
246
	blr
247
 
248
memcpy:
1288 jermar 249
memcpy_from_uspace:
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memcpy_to_uspace:
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860 decky 252
	srwi. r7, r5, 3
253
	addi r6, r3, -4
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	addi r4, r4, -4
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	beq	2f
256
 
257
	andi. r0, r6, 3
258
	mtctr r7
259
	bne 5f
260
 
261
	1:
262
 
263
	lwz r7, 4(r4)
264
	lwzu r8, 8(r4)
265
	stw r7, 4(r6)
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	stwu r8, 8(r6)
267
	bdnz 1b
268
 
269
	andi. r5, r5, 7
270
 
271
	2:
272
 
273
	cmplwi 0, r5, 4
274
	blt 3f
275
 
276
	lwzu r0, 4(r4)
277
	addi r5, r5, -4
278
	stwu r0, 4(r6)
279
 
280
	3:
281
 
282
	cmpwi 0, r5, 0
283
	beqlr
284
	mtctr r5
285
	addi r4, r4, 3
286
	addi r6, r6, 3
287
 
288
	4:
289
 
290
	lbzu r0, 1(r4)
291
	stbu r0, 1(r6)
292
	bdnz 4b
210 decky 293
	blr
860 decky 294
 
295
	5:
296
 
297
	subfic r0, r0, 4
298
	mtctr r0
299
 
300
	6:
301
 
302
	lbz r7, 4(r4)
303
	addi r4, r4, 1
304
	stb r7, 4(r6)
305
	addi r6, r6, 1
306
	bdnz 6b
307
	subf r5, r0, r5
308
	rlwinm. r7, r5, 32-3, 3, 31
309
	beq 2b
310
	mtctr r7
311
	b 1b
1288 jermar 312
 
313
memcpy_from_uspace_failover_address:
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memcpy_to_uspace_failover_address:
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	b memcpy_from_uspace_failover_address