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2235 stepan 1
/*
2179 stepan 2
 * Copyright (c) 2007 Petr Stepan
3
 * All rights reserved.
4
 *
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
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 * are met:
8
 *
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
28
 
29
/** @addtogroup arm32
30
 * @{
31
 */
32
/** @file
2410 stepan 33
 *  @brief Exception handlers and exception initialization routines.
2179 stepan 34
 */
35
 
36
#include <arch/exception.h>
2326 kebrt 37
#include <arch/debug/print.h>
2179 stepan 38
#include <arch/memstr.h>
2235 stepan 39
#include <arch/regutils.h>
40
#include <interrupt.h>
2306 kebrt 41
#include <arch/machine.h>
2282 jancik 42
#include <arch/mm/page_fault.h>
2284 stepan 43
#include <print.h>
2286 stepan 44
#include <syscall/syscall.h>
2179 stepan 45
 
2407 stepan 46
/** Offset used in calculation of exception handler's relative address.
47
 *
48
 * @see install_handler()
49
 */
50
#define PREFETCH_OFFSET      0x8
2329 kebrt 51
 
2407 stepan 52
/** LDR instruction's code */
2306 kebrt 53
#define LDR_OPCODE           0xe59ff000
2179 stepan 54
 
2407 stepan 55
/** Number of exception vectors. */
56
#define EXC_VECTORS          8
2329 kebrt 57
 
2407 stepan 58
/** Size of memory block occupied by exception vectors. */
59
#define EXC_VECTORS_SIZE     (EXC_VECTORS * 4)
60
 
2355 stepan 61
/** Switches to kernel stack and saves all registers there.
62
 *
63
 * Temporary exception stack is used to save a few registers
64
 * before stack switch takes place.
65
 */
2284 stepan 66
inline static void setup_stack_and_save_regs()
67
{
2464 jermar 68
    asm volatile(
69
        "ldr r13, =exc_stack        \n"
70
        "stmfd r13!, {r0}       \n"
71
        "mrs r0, spsr           \n"
72
        "and r0, r0, #0x1f      \n"
73
        "cmp r0, #0x10          \n"
74
        "bne 1f             \n"
75
 
76
        /* prev mode was usermode */
77
        "ldmfd r13!, {r0}       \n"
78
        "ldr r13, =supervisor_sp    \n"
79
        "ldr r13, [r13]         \n"
80
        "stmfd r13!, {lr}       \n"
81
        "stmfd r13!, {r0-r12}       \n"
82
        "stmfd r13!, {r13, lr}^     \n"
83
        "mrs r0, spsr           \n"
84
        "stmfd r13!, {r0}       \n"
85
        "b 2f               \n"
86
 
87
        /* mode was not usermode */
88
    "1:\n"
89
        "stmfd r13!, {r1, r2, r3}   \n"
90
        "mrs r1, cpsr           \n"
91
        "mov r2, lr         \n"
92
        "bic r1, r1, #0x1f      \n"
93
        "orr r1, r1, r0         \n"
94
        "mrs r0, cpsr           \n"
95
        "msr cpsr_c, r1         \n"
96
 
97
        "mov r3, r13            \n"
98
        "stmfd r13!, {r2}       \n"
99
        "mov r2, lr         \n"
100
        "stmfd r13!, {r4-r12}       \n"
101
        "mov r1, r13            \n"
102
        /* the following two lines are for debugging */
103
        "mov sp, #0         \n"
104
        "mov lr, #0         \n"
105
        "msr cpsr_c, r0         \n"
106
 
107
        "ldmfd r13!, {r4, r5, r6, r7}   \n"
108
        "stmfd r1!, {r4, r5, r6}    \n"
109
        "stmfd r1!, {r7}        \n"
110
        "stmfd r1!, {r2}        \n"
111
        "stmfd r1!, {r3}        \n"
112
        "mrs r0, spsr           \n"
113
        "stmfd r1!, {r0}        \n"
114
        "mov r13, r1            \n"
115
    "2:\n"
116
    );
2284 stepan 117
}
118
 
2355 stepan 119
/** Returns from exception mode.
120
 *
121
 * Previously saved state of registers (including control register)
122
 * is restored from the stack.
123
 */
2284 stepan 124
inline static void load_regs()
125
{
2464 jermar 126
    asm volatile(
127
        "ldmfd r13!, {r0}       \n"
128
        "msr spsr, r0           \n"
129
        "and r0, r0, #0x1f      \n"
130
        "cmp r0, #0x10          \n"
131
        "bne 1f             \n"
132
 
133
        /* return to user mode */
134
        "ldmfd r13!, {r13, lr}^     \n"
135
        "b 2f               \n"
136
 
137
        /* return to non-user mode */
138
    "1:\n"
139
        "ldmfd r13!, {r1, r2}       \n"
140
        "mrs r3, cpsr           \n"
141
        "bic r3, r3, #0x1f      \n"
142
        "orr r3, r3, r0         \n"
143
        "mrs r0, cpsr           \n"
144
        "msr cpsr_c, r3         \n"
145
 
146
        "mov r13, r1            \n"
147
        "mov lr, r2         \n"
148
        "msr cpsr_c, r0         \n"
149
 
150
        /* actual return */
151
    "2:\n"
152
        "ldmfd r13, {r0-r12, pc}^\n"
153
    );
2284 stepan 154
}
155
 
2411 stepan 156
 
2407 stepan 157
/** Switch CPU to mode in which interrupts are serviced (currently it
158
 * is Undefined mode).
159
 *
160
 * The default mode for interrupt servicing (Interrupt Mode)
161
 * can not be used because of nested interrupts (which can occur
2464 jermar 162
 * because interrupts are enabled in higher levels of interrupt handler).
2407 stepan 163
 */
2414 kebrt 164
inline static void switch_to_irq_servicing_mode()
2407 stepan 165
{
166
    /* switch to Undefined mode */
167
    asm volatile(
168
        /* save regs used during switching */
169
        "stmfd sp!, {r0-r3}     \n"
170
 
171
        /* save stack pointer and link register to r1, r2 */
172
        "mov r1, sp         \n"
173
        "mov r2, lr         \n"
174
 
175
        /* mode switch */
176
        "mrs r0, cpsr           \n"
177
        "bic r0, r0, #0x1f      \n"
178
        "orr r0, r0, #0x1b      \n"
179
        "msr cpsr_c, r0         \n"
180
 
181
        /* restore saved sp and lr */
182
        "mov sp, r1         \n"
183
        "mov lr, r2         \n"
184
 
185
        /* restore original regs */
186
        "ldmfd sp!, {r0-r3}     \n"
187
    );
188
}
189
 
2355 stepan 190
/** Calls exception dispatch routine. */
2235 stepan 191
#define CALL_EXC_DISPATCH(exception)        \
192
    asm("mov r0, %0" : : "i" (exception));  \
2284 stepan 193
    asm("mov r1, r13");         \
2235 stepan 194
    asm("bl exc_dispatch");     
195
 
196
/** General exception handler.
2355 stepan 197
 *
2235 stepan 198
 *  Stores registers, dispatches the exception,
199
 *  and finally restores registers and returns from exception processing.
2329 kebrt 200
 *
201
 *  @param exception Exception number.
2235 stepan 202
 */
203
#define PROCESS_EXCEPTION(exception)        \
2284 stepan 204
    setup_stack_and_save_regs();        \
2235 stepan 205
    CALL_EXC_DISPATCH(exception)        \
2284 stepan 206
    load_regs();
2235 stepan 207
 
208
/** Updates specified exception vector to jump to given handler.
2355 stepan 209
 *
2329 kebrt 210
 *  Addresses of handlers are stored in memory following exception vectors.
2235 stepan 211
 */
212
static void install_handler (unsigned handler_addr, unsigned* vector)
213
{
214
    /* relative address (related to exc. vector) of the word
215
     * where handler's address is stored
216
    */
2611 jermar 217
    volatile uint32_t handler_address_ptr = EXC_VECTORS_SIZE -
218
        PREFETCH_OFFSET;
2179 stepan 219
 
2235 stepan 220
    /* make it LDR instruction and store at exception vector */
221
    *vector = handler_address_ptr | LDR_OPCODE;
2179 stepan 222
 
2235 stepan 223
    /* store handler's address */
224
    *(vector + EXC_VECTORS) = handler_addr;
2284 stepan 225
 
2179 stepan 226
}
227
 
2329 kebrt 228
/** Low-level Reset Exception handler. */
2235 stepan 229
static void reset_exception_entry()
230
{
231
    PROCESS_EXCEPTION(EXC_RESET);
2179 stepan 232
}
233
 
2329 kebrt 234
/** Low-level Software Interrupt Exception handler. */
2235 stepan 235
static void swi_exception_entry()
236
{
237
    PROCESS_EXCEPTION(EXC_SWI);
2179 stepan 238
}
239
 
2329 kebrt 240
/** Low-level Undefined Instruction Exception handler. */
2235 stepan 241
static void undef_instr_exception_entry()
242
{
243
    PROCESS_EXCEPTION(EXC_UNDEF_INSTR);
244
}
245
 
2329 kebrt 246
/** Low-level Fast Interrupt Exception handler. */
2235 stepan 247
static void fiq_exception_entry()
248
{
249
    PROCESS_EXCEPTION(EXC_FIQ);
250
}
251
 
2329 kebrt 252
/** Low-level Prefetch Abort Exception handler. */
2235 stepan 253
static void prefetch_abort_exception_entry()
254
{
255
    asm("sub lr, lr, #4");
256
    PROCESS_EXCEPTION(EXC_PREFETCH_ABORT);
257
}
258
 
2329 kebrt 259
/** Low-level Data Abort Exception handler. */
2235 stepan 260
static void data_abort_exception_entry()
261
{
262
    asm("sub lr, lr, #8");
263
    PROCESS_EXCEPTION(EXC_DATA_ABORT);
264
}
265
 
2355 stepan 266
/** Low-level Interrupt Exception handler.
267
 *
268
 * CPU is switched to Undefined mode before further interrupt processing
269
 * because of possible occurence of nested interrupt exception, which
270
 * would overwrite (and thus spoil) stack pointer.
271
 */
2235 stepan 272
static void irq_exception_entry()
273
{
274
    asm("sub lr, lr, #4");
2344 stepan 275
    setup_stack_and_save_regs();
2407 stepan 276
 
2414 kebrt 277
    switch_to_irq_servicing_mode();
2407 stepan 278
 
2344 stepan 279
    CALL_EXC_DISPATCH(EXC_IRQ)
280
 
281
    load_regs();
2235 stepan 282
}
283
 
2286 stepan 284
/** Software Interrupt handler.
285
 *
286
 * Dispatches the syscall.
287
 */
2304 kebrt 288
static void swi_exception(int exc_no, istate_t *istate)
2284 stepan 289
{
2464 jermar 290
    istate->r0 = syscall_handler(istate->r0, istate->r1, istate->r2,
2611 jermar 291
        istate->r3, istate->r4, istate->r5, istate->r6);
2284 stepan 292
}
293
 
2235 stepan 294
/** Interrupt Exception handler.
2286 stepan 295
 *
2464 jermar 296
 * Determines the sources of interrupt and calls their handlers.
2235 stepan 297
 */
2304 kebrt 298
static void irq_exception(int exc_no, istate_t *istate)
2235 stepan 299
{
2306 kebrt 300
    machine_irq_exception(exc_no, istate);
2235 stepan 301
}
302
 
2329 kebrt 303
/** Fills exception vectors with appropriate exception handlers. */
2235 stepan 304
void install_exception_handlers(void)
305
{
2464 jermar 306
    install_handler((unsigned) reset_exception_entry,
307
        (unsigned *) EXC_RESET_VEC);
2235 stepan 308
 
2464 jermar 309
    install_handler((unsigned) undef_instr_exception_entry,
310
        (unsigned *) EXC_UNDEF_INSTR_VEC);
2235 stepan 311
 
2464 jermar 312
    install_handler((unsigned) swi_exception_entry,
313
        (unsigned *) EXC_SWI_VEC);
2235 stepan 314
 
2464 jermar 315
    install_handler((unsigned) prefetch_abort_exception_entry,
316
        (unsigned *) EXC_PREFETCH_ABORT_VEC);
2235 stepan 317
 
2464 jermar 318
    install_handler((unsigned) data_abort_exception_entry,
319
        (unsigned *) EXC_DATA_ABORT_VEC);
2235 stepan 320
 
2464 jermar 321
    install_handler((unsigned) irq_exception_entry,
322
        (unsigned *) EXC_IRQ_VEC);
2235 stepan 323
 
324
    install_handler((unsigned)fiq_exception_entry,
2464 jermar 325
        (unsigned *) EXC_FIQ_VEC);
2179 stepan 326
}
327
 
2284 stepan 328
#ifdef HIGH_EXCEPTION_VECTORS
2329 kebrt 329
/** Activates use of high exception vectors addresses. */
2464 jermar 330
static void high_vectors(void)
2262 stepan 331
{
332
    uint32_t control_reg;
333
 
2464 jermar 334
    asm volatile("mrc p15, 0, %0, c1, c1" : "=r" (control_reg));
2262 stepan 335
 
2464 jermar 336
    /* switch on the high vectors bit */
2262 stepan 337
    control_reg |= CP15_R1_HIGH_VECTORS_BIT;
338
 
2464 jermar 339
    asm volatile("mcr p15, 0, %0, c1, c1" : : "r" (control_reg));
2262 stepan 340
}
2284 stepan 341
#endif
2262 stepan 342
 
2245 stepan 343
/** Initializes exception handling.
344
 *
345
 * Installs low-level exception handlers and then registers
346
 * exceptions and their handlers to kernel exception dispatcher.
347
 */
2235 stepan 348
void exception_init(void)
349
{
2262 stepan 350
#ifdef HIGH_EXCEPTION_VECTORS
351
    high_vectors();
352
#endif
2245 stepan 353
    install_exception_handlers();
354
 
2235 stepan 355
    exc_register(EXC_IRQ, "interrupt", (iroutine) irq_exception);
2464 jermar 356
    exc_register(EXC_PREFETCH_ABORT, "prefetch abort",
357
        (iroutine) prefetch_abort);
2277 jancik 358
    exc_register(EXC_DATA_ABORT, "data abort", (iroutine) data_abort);
2284 stepan 359
    exc_register(EXC_SWI, "software interrupt", (iroutine) swi_exception);
2179 stepan 360
}
361
 
2326 kebrt 362
/** Prints #istate_t structure content.
363
 *
364
 * @param istate Structure to be printed.
365
 */
2304 kebrt 366
void print_istate(istate_t *istate)
367
{
368
    dprintf("istate dump:\n");
369
 
370
    dprintf(" r0: %x    r1: %x    r2: %x    r3: %x\n",
2464 jermar 371
        istate->r0, istate->r1, istate->r2, istate->r3);
2304 kebrt 372
    dprintf(" r4: %x    r5: %x    r6: %x    r7: %x\n",
2464 jermar 373
        istate->r4, istate->r5, istate->r6, istate->r7);
2304 kebrt 374
    dprintf(" r8: %x    r8: %x   r10: %x   r11: %x\n",
2464 jermar 375
        istate->r8, istate->r9, istate->r10, istate->r11);
2304 kebrt 376
    dprintf(" r12: %x    sp: %x    lr: %x  spsr: %x\n",
2464 jermar 377
        istate->r12, istate->sp, istate->lr, istate->spsr);
2304 kebrt 378
 
379
    dprintf(" pc: %x\n", istate->pc);
380
}
381
 
2179 stepan 382
/** @}
383
 */