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4221 | trochtova | 1 | #include <unistd.h> |
2 | #include <ddi.h> |
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3 | #include <libarch/ddi.h> |
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4 | #include <stdio.h> |
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5 | |||
6 | #include "internal.h" |
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7 | #include "header.h" |
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8 | |||
9 | /* physical addresses and offsets */ |
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10 | #define U2P_BASE 0x1FE00000000 |
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11 | #define PCI_CONF_OFFSET 0x001000000 |
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12 | #define PCI_CONF_SIZE 0x001000000 |
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13 | #define PCI_CONF_BASE (U2P_BASE + PCI_CONF_OFFSET) |
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14 | |||
15 | /* virtual address of PCI configuration space */ |
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16 | static void *conf_addr = 0; |
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17 | |||
18 | /* |
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19 | * virtual address of specified PCI configuration register: |
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20 | * bus ... bus number (0 for top level PCI bus B, 1 for top level PCI bus A) |
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21 | * dev ... device number (0 - 15) |
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22 | * fn ... function number (0 - 7) |
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23 | * reg ... register number (register's position within PCI configuration header) |
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24 | **/ |
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25 | #define CONF_ADDR(bus, dev, fn, reg) (conf_addr + ((bus << 16) | (dev << 11) | (fn << 8) | (reg << 2))) |
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26 | |||
27 | |||
28 | static void us2i_init(struct pci_access *a) |
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29 | { |
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30 | } |
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31 | |||
32 | static void us2i_cleanup(struct pci_access *a UNUSED) |
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33 | { |
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34 | } |
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35 | |||
36 | static int us2i_detect(struct pci_access *a) |
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37 | { |
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38 | unsigned int tmp; |
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39 | |||
40 | /* |
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41 | * Gain control over PCI configuration ports. |
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42 | */ |
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43 | if (pio_enable((void *)PCI_CONF_BASE, PCI_CONF_SIZE, &conf_addr)) { |
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44 | return 0; |
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45 | } |
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46 | |||
47 | printf("PCI: conf_addr = %lx", conf_addr); |
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48 | printf("PCI: vendor id address = %lx", CONF_ADDR(0, 0, 0, PCI_VENDOR_ID)); |
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49 | |||
50 | asm volatile ("sethi 0x42224, %g0"); |
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51 | int vendor_id = pio_read_16(CONF_ADDR(0, 0, 0, PCI_VENDOR_ID)); |
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52 | vendor_id = vendor_id | pio_read_8(CONF_ADDR(0, 0, 0, PCI_VENDOR_ID + 1)) << 8; |
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53 | int device_id = pio_read_8(CONF_ADDR(0, 0, 0, PCI_DEVICE_ID)); |
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54 | device_id = device_id | pio_read_8(CONF_ADDR(0, 0, 0, PCI_DEVICE_ID + 1)) << 8; |
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55 | |||
56 | printf("PCI: vendor id = %x", vendor_id); |
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57 | printf("PCI: device id = %x", device_id); |
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58 | |||
59 | return vendor_id == 0x108E && device_id == 0x8000; // should be Psycho from Sun Microsystems |
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60 | } |
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61 | |||
62 | static int us2i_read(struct pci_dev *d, int pos, byte * buf, int len) |
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63 | { |
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64 | if (pos >= 256) |
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65 | return 0; |
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66 | |||
67 | switch (len) { |
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68 | case 1: |
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69 | buf[0] = pio_read_8(CONF_ADDR(d->bus, d->dev, d->func, pos)); |
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70 | break; |
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71 | case 2: |
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72 | us2i_read(d, pos + 1, buf, 1); // unlike PCI, sparc uses big endian |
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73 | us2i_read(d, pos, buf + 1, 1); |
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74 | break; |
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75 | case 4: |
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76 | us2i_read(d, pos + 3, buf, 1); // endians in an ugly way ... FIX ME |
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77 | us2i_read(d, pos + 2, buf + 1, 1); |
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78 | us2i_read(d, pos + 1, buf + 2, 1); |
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79 | us2i_read(d, pos, buf + 3, 1); |
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80 | break; |
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81 | default: |
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82 | return pci_generic_block_read(d, pos, buf, len); |
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83 | } |
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84 | return 1; |
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85 | } |
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86 | |||
87 | static int us2i_write(struct pci_dev *d, int pos, byte * buf, int len) |
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88 | { |
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89 | if (pos >= 256) |
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90 | return 0; |
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91 | |||
92 | switch (len) { |
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93 | case 1: |
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94 | pio_write_8(CONF_ADDR(d->bus, d->dev, d->func, pos), buf[0]); |
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95 | break; |
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96 | case 2: |
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97 | us2i_write(d, pos + 1, buf, 1); // unlike PCI, sparc uses big endian |
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98 | us2i_write(d, pos, buf + 1, 1); |
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99 | break; |
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100 | case 4: |
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101 | us2i_write(d, pos + 3, buf, 1); // endians in an ugly way ... FIX ME |
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102 | us2i_write(d, pos + 2, buf + 1, 1); |
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103 | us2i_write(d, pos + 1, buf + 2, 1); |
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104 | us2i_write(d, pos, buf + 3, 1); |
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105 | break; |
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106 | default: |
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107 | return pci_generic_block_write(d, pos, buf, len); |
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108 | } |
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109 | return 1; |
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110 | } |
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111 | |||
112 | |||
113 | struct pci_methods pm_us2i = { |
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114 | "Ultra Sparc IIi", |
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115 | NULL, /* config */ |
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116 | us2i_detect, |
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117 | us2i_init, |
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118 | us2i_cleanup, |
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119 | pci_generic_scan, |
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120 | pci_generic_fill_info, |
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121 | us2i_read, |
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122 | us2i_write, |
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123 | NULL, /* init_dev */ |
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124 | NULL /* cleanup_dev */ |
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125 | }; |