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/*
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 * Copyright (c) 2005 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup sparc64
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 * @{
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 */
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/** @file
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 */
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#ifndef KERN_sparc64_REGDEF_H_
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#define KERN_sparc64_REGDEF_H_
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#define PSTATE_IE_BIT   (1 << 1)
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#define PSTATE_AM_BIT   (1 << 3)
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#define PSTATE_AG_BIT   (1 << 0)
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#define PSTATE_IG_BIT   (1 << 11)
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#define PSTATE_MG_BIT   (1 << 10)
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#define PSTATE_PRIV_BIT (1 << 2)
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#define PSTATE_PEF_BIT  (1 << 4)
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#define TSTATE_PSTATE_SHIFT 8
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#define TSTATE_PRIV_BIT     (PSTATE_PRIV_BIT << TSTATE_PSTATE_SHIFT)
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#define TSTATE_IE_BIT       (PSTATE_IE_BIT << TSTATE_PSTATE_SHIFT)
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#define TSTATE_PEF_BIT      (PSTATE_PEF_BIT << TSTATE_PSTATE_SHIFT)
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#define TSTATE_CWP_MASK     0x1f
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#define WSTATE_NORMAL(n)    (n)
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#define WSTATE_OTHER(n)     ((n) << 3)
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/*
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 * The following definitions concern the UPA_CONFIG register on US and the
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 * FIREPLANE_CONFIG register on US3.
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 */
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#define ICBUS_CONFIG_MID_SHIFT    17
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#endif
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/** @}
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 */