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2278 | jancik | 1 | /* |
2 | * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
29 | /** @addtogroup arm32mm |
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30 | * @{ |
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31 | */ |
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32 | /** @file |
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2410 | stepan | 33 | * @brief Page fault related functions. |
2278 | jancik | 34 | */ |
35 | #include <panic.h> |
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36 | #include <arch/exception.h> |
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2326 | kebrt | 37 | #include <arch/debug/print.h> |
2278 | jancik | 38 | #include <arch/mm/page_fault.h> |
39 | #include <mm/as.h> |
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40 | #include <genarch/mm/page_pt.h> |
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41 | #include <arch.h> |
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2284 | stepan | 42 | #include <interrupt.h> |
2278 | jancik | 43 | |
44 | |||
2304 | kebrt | 45 | /** Returns value stored in fault status register. |
2361 | jancik | 46 | * FSR contain reason of page fault |
2304 | kebrt | 47 | * |
2362 | jancik | 48 | * @return Value stored in CP15 fault status register (FSR). |
2304 | kebrt | 49 | */ |
50 | static inline fault_status_t read_fault_status_register(void) |
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51 | { |
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52 | fault_status_union_t fsu; |
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2278 | jancik | 53 | |
2304 | kebrt | 54 | // fault adress is stored in CP15 register 5 |
55 | asm volatile ( |
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2278 | jancik | 56 | "mrc p15, 0, %0, c5, c0, 0" |
2304 | kebrt | 57 | : "=r"(fsu.dummy) |
2278 | jancik | 58 | ); |
2304 | kebrt | 59 | return fsu.fs; |
2278 | jancik | 60 | } |
61 | |||
2304 | kebrt | 62 | |
63 | /** Returns FAR (fault address register) content. |
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64 | * |
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2362 | jancik | 65 | * @return FAR (fault address register) content (address that caused a page fault) |
2278 | jancik | 66 | */ |
2304 | kebrt | 67 | static inline uintptr_t read_fault_address_register(void) |
68 | { |
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69 | uintptr_t ret; |
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70 | |||
71 | // fault adress is stored in CP15 register 6 |
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2278 | jancik | 72 | asm volatile ( |
73 | "mrc p15, 0, %0, c6, c0, 0" |
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2304 | kebrt | 74 | : "=r"(ret) |
2278 | jancik | 75 | ); |
2304 | kebrt | 76 | return ret; |
77 | } |
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2278 | jancik | 78 | |
2304 | kebrt | 79 | |
80 | /** Decides whether the instructions is load/store or not. |
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81 | * |
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2362 | jancik | 82 | * @param instr Instruction |
2304 | kebrt | 83 | * |
2362 | jancik | 84 | * @return true when instruction is load/store, false otherwise |
2278 | jancik | 85 | */ |
2304 | kebrt | 86 | static inline bool is_load_store_instruction(instruction_t instr) |
87 | { |
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88 | // load store immediate offset |
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89 | if (instr.type == 0x2) { |
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2278 | jancik | 90 | return true; |
2304 | kebrt | 91 | } |
2278 | jancik | 92 | |
2304 | kebrt | 93 | // load store register offset |
94 | if (instr.type == 0x3 && instr.bit4 == 0) { |
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2278 | jancik | 95 | return true; |
2304 | kebrt | 96 | } |
2278 | jancik | 97 | |
2304 | kebrt | 98 | // load store multiple |
99 | if (instr.type == 0x4) { |
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2278 | jancik | 100 | return true; |
2304 | kebrt | 101 | } |
2278 | jancik | 102 | |
2304 | kebrt | 103 | // coprocessor load/store |
104 | if (instr.type == 0x6) { |
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2278 | jancik | 105 | return true; |
2304 | kebrt | 106 | } |
2278 | jancik | 107 | |
108 | return false; |
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109 | } |
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110 | |||
2304 | kebrt | 111 | |
112 | /** Decides whether the instructions is swap or not. |
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113 | * |
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2362 | jancik | 114 | * @param instr Instruction |
2304 | kebrt | 115 | * |
2362 | jancik | 116 | * @return true when instruction is swap, false otherwise |
2278 | jancik | 117 | */ |
2304 | kebrt | 118 | static inline bool is_swap_instruction(instruction_t instr) |
119 | { |
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2278 | jancik | 120 | // swap, swapb instruction |
2304 | kebrt | 121 | if (instr.type == 0x0 && |
122 | (instr.opcode == 0x8 || instr.opcode == 0xa) && |
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123 | instr.access == 0x0 && instr.bits567 == 0x4 && instr.bit4 == 1) { |
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2278 | jancik | 124 | return true; |
2304 | kebrt | 125 | } |
2278 | jancik | 126 | |
127 | return false; |
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128 | } |
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129 | |||
130 | |||
2304 | kebrt | 131 | /** Decides whether read or write into memory is requested. |
2278 | jancik | 132 | * |
2362 | jancik | 133 | * @param instr_addr Address of instruction which tries to access memory |
134 | * @param badvaddr Virtual address the instruction tries to access |
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2304 | kebrt | 135 | * |
2362 | jancik | 136 | * @return Type of access into memmory |
137 | * Note: Returns #PF_ACCESS_EXEC if no memory access is requested |
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2278 | jancik | 138 | */ |
2304 | kebrt | 139 | static pf_access_t get_memory_access_type(uint32_t instr_addr, uintptr_t badvaddr) |
140 | { |
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141 | instruction_union_t instr_union; |
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142 | instr_union.pc = instr_addr; |
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2278 | jancik | 143 | |
2304 | kebrt | 144 | instruction_t instr = *(instr_union.instr); |
2278 | jancik | 145 | |
2304 | kebrt | 146 | // undefined instructions |
147 | if (instr.condition == 0xf) { |
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148 | panic("page_fault - instruction not access memmory (instr_code: %x, badvaddr:%x)", |
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149 | instr, badvaddr); |
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2278 | jancik | 150 | return PF_ACCESS_EXEC; |
2304 | kebrt | 151 | } |
2278 | jancik | 152 | |
153 | // load store instructions |
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2304 | kebrt | 154 | if (is_load_store_instruction(instr)) { |
155 | if (instr.access == 1) { |
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2278 | jancik | 156 | return PF_ACCESS_READ; |
157 | } else { |
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158 | return PF_ACCESS_WRITE; |
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159 | } |
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2304 | kebrt | 160 | } |
2278 | jancik | 161 | |
162 | // swap, swpb instruction |
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2304 | kebrt | 163 | if (is_swap_instruction(instr)) { |
2278 | jancik | 164 | /* Swap instructions make read and write in one step. |
165 | * Type of access that caused exception have to page tables |
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166 | * and access rights. |
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167 | */ |
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2304 | kebrt | 168 | |
169 | pte_level1_t* pte = (pte_level1_t*) |
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170 | pt_mapping_operations.mapping_find(AS, badvaddr); |
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2278 | jancik | 171 | |
2318 | jancik | 172 | if ( pte == NULL ) { |
173 | return PF_ACCESS_READ; |
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174 | } |
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2278 | jancik | 175 | |
2304 | kebrt | 176 | /* check if read possible |
177 | * Note: Don't check PTE_READABLE because it returns 1 everytimes */ |
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2278 | jancik | 178 | if ( !PTE_PRESENT(pte) ) { |
2304 | kebrt | 179 | return PF_ACCESS_READ; |
2278 | jancik | 180 | } |
2304 | kebrt | 181 | |
2278 | jancik | 182 | if ( !PTE_WRITABLE(pte) ) { |
183 | return PF_ACCESS_WRITE; |
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2304 | kebrt | 184 | } else { |
185 | // badvaddr is present readable and writeable but error occured ... why? |
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186 | panic("page_fault - swap instruction, but address readable and writeable" |
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187 | "(instr_code:%X, badvaddr:%X)", instr, badvaddr); |
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2278 | jancik | 188 | } |
189 | } |
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2304 | kebrt | 190 | |
191 | panic("page_fault - instruction not access memory (instr_code: %x, badvaddr:%x)", |
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192 | instr, badvaddr); |
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193 | |||
2278 | jancik | 194 | return PF_ACCESS_EXEC; |
195 | } |
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196 | |||
2304 | kebrt | 197 | /** Handles "data abort" exception (load or store at invalid address). |
198 | * |
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2362 | jancik | 199 | * @param exc_no exception number |
200 | * @param istate CPU state when exception occured |
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2278 | jancik | 201 | */ |
2304 | kebrt | 202 | void data_abort(int exc_no, istate_t *istate) |
203 | { |
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204 | fault_status_t fsr = read_fault_status_register(); |
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205 | uintptr_t badvaddr = read_fault_address_register(); |
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2278 | jancik | 206 | |
2304 | kebrt | 207 | pf_access_t access = get_memory_access_type(istate->pc, badvaddr); |
208 | |||
209 | int ret = as_page_fault(badvaddr, access, istate); |
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2278 | jancik | 210 | |
2304 | kebrt | 211 | if (ret == AS_PF_FAULT) { |
212 | print_istate(istate); |
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213 | dprintf("page fault - pc: %x, va: %x, status: %x(%x), access:%d\n", |
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214 | istate->pc, badvaddr, fsr.status, fsr, access); |
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2278 | jancik | 215 | |
2304 | kebrt | 216 | fault_if_from_uspace(istate, "Page fault: %#x", badvaddr); |
2298 | stepan | 217 | panic("page fault\n"); |
2304 | kebrt | 218 | } |
2278 | jancik | 219 | } |
220 | |||
2304 | kebrt | 221 | /** Handles "prefetch abort" exception (instruction couldn't be executed). |
222 | * |
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2362 | jancik | 223 | * @param exc_no exception number |
224 | * @param istate CPU state when exception occured |
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2278 | jancik | 225 | */ |
2304 | kebrt | 226 | void prefetch_abort(int exc_no, istate_t *istate) |
227 | { |
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2298 | stepan | 228 | int ret = as_page_fault(istate->pc, PF_ACCESS_EXEC, istate); |
2278 | jancik | 229 | |
2304 | kebrt | 230 | if (ret == AS_PF_FAULT) { |
231 | dprintf("prefetch_abort\n"); |
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232 | print_istate(istate); |
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233 | panic("page fault - prefetch_abort at address: %x\n", istate->pc); |
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234 | } |
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2278 | jancik | 235 | } |
236 | |||
237 | /** @} |
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238 | */ |
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239 |