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2278 jancik 1
/*
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 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup arm32mm
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 * @{
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 */
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/** @file
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 */
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#include <panic.h>
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#include <arch/exception.h>
2326 kebrt 36
#include <arch/debug/print.h>
2278 jancik 37
#include <arch/mm/page_fault.h>
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#include <mm/as.h>
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#include <genarch/mm/page_pt.h>
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#include <arch.h>
2284 stepan 41
#include <interrupt.h>
2278 jancik 42
 
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2304 kebrt 44
/** Returns value stored in fault status register.
2361 jancik 45
 *      FSR contain reason of page fault
2304 kebrt 46
 *
2362 jancik 47
 *  @return Value stored in CP15 fault status register (FSR).
2304 kebrt 48
 */
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static inline fault_status_t read_fault_status_register(void)
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{
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    fault_status_union_t fsu;
2278 jancik 52
 
2304 kebrt 53
    // fault adress is stored in CP15 register 5
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    asm volatile (
2278 jancik 55
        "mrc p15, 0, %0, c5, c0, 0"
2304 kebrt 56
        : "=r"(fsu.dummy)
2278 jancik 57
    );
2304 kebrt 58
    return fsu.fs;
2278 jancik 59
}
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2304 kebrt 61
 
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/** Returns FAR (fault address register) content.
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 *
2362 jancik 64
 *  @return FAR (fault address register) content (address that caused a page fault)
2278 jancik 65
 */
2304 kebrt 66
static inline uintptr_t read_fault_address_register(void)
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{
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    uintptr_t ret;
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    // fault adress is stored in CP15 register 6
2278 jancik 71
    asm volatile (
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        "mrc p15, 0, %0, c6, c0, 0"
2304 kebrt 73
        : "=r"(ret)
2278 jancik 74
    );
2304 kebrt 75
    return ret;
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}
2278 jancik 77
 
2304 kebrt 78
 
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/** Decides whether the instructions is load/store or not.
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 *
2362 jancik 81
 * @param instr Instruction
2304 kebrt 82
 *
2362 jancik 83
 * @return true when instruction is load/store, false otherwise
2278 jancik 84
 */
2304 kebrt 85
static inline bool is_load_store_instruction(instruction_t instr)
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{
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    // load store immediate offset
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    if (instr.type == 0x2) {
2278 jancik 89
        return true;
2304 kebrt 90
    }
2278 jancik 91
 
2304 kebrt 92
    // load store register offset
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    if (instr.type == 0x3 && instr.bit4 == 0) {
2278 jancik 94
        return true;
2304 kebrt 95
    }
2278 jancik 96
 
2304 kebrt 97
    // load store multiple
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    if (instr.type == 0x4) {
2278 jancik 99
        return true;
2304 kebrt 100
    }
2278 jancik 101
 
2304 kebrt 102
    // coprocessor load/store
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    if (instr.type == 0x6) {
2278 jancik 104
        return true;
2304 kebrt 105
    }
2278 jancik 106
 
107
    return false;
108
}
109
 
2304 kebrt 110
 
111
/** Decides whether the instructions is swap or not.
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 *
2362 jancik 113
 * @param instr Instruction
2304 kebrt 114
 *
2362 jancik 115
 * @return true when instruction is swap, false otherwise
2278 jancik 116
 */
2304 kebrt 117
static inline bool is_swap_instruction(instruction_t instr)
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{
2278 jancik 119
    // swap, swapb instruction
2304 kebrt 120
    if (instr.type == 0x0 &&
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        (instr.opcode == 0x8 || instr.opcode == 0xa) &&
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        instr.access == 0x0 && instr.bits567 == 0x4 && instr.bit4 == 1) {
2278 jancik 123
        return true;
2304 kebrt 124
    }
2278 jancik 125
 
126
    return false;
127
}
128
 
129
 
2304 kebrt 130
/** Decides whether read or write into memory is requested.
2278 jancik 131
 *
2362 jancik 132
 * @param instr_addr   Address of instruction which tries to access memory
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 * @param badvaddr     Virtual address the instruction tries to access
2304 kebrt 134
 *
2362 jancik 135
 * @return Type of access into memmory
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 * Note:   Returns #PF_ACCESS_EXEC if no memory access is requested
2278 jancik 137
 */
2304 kebrt 138
static pf_access_t get_memory_access_type(uint32_t instr_addr, uintptr_t badvaddr)
139
{  
140
    instruction_union_t instr_union;
141
    instr_union.pc = instr_addr;
2278 jancik 142
 
2304 kebrt 143
    instruction_t instr = *(instr_union.instr);
2278 jancik 144
 
2304 kebrt 145
    // undefined instructions
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    if (instr.condition == 0xf) {
147
        panic("page_fault - instruction not access memmory (instr_code: %x, badvaddr:%x)",
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            instr, badvaddr);
2278 jancik 149
        return PF_ACCESS_EXEC;
2304 kebrt 150
    }
2278 jancik 151
 
152
    // load store instructions
2304 kebrt 153
    if (is_load_store_instruction(instr)) {
154
        if (instr.access == 1) {
2278 jancik 155
            return PF_ACCESS_READ;
156
        } else {
157
            return PF_ACCESS_WRITE;
158
        }
2304 kebrt 159
    }
2278 jancik 160
 
161
    // swap, swpb instruction
2304 kebrt 162
    if (is_swap_instruction(instr)) {
2278 jancik 163
        /* Swap instructions make read and write in one step.
164
         * Type of access that caused exception have to page tables
165
         *  and access rights.
166
         */
2304 kebrt 167
 
168
        pte_level1_t* pte = (pte_level1_t*)
169
        pt_mapping_operations.mapping_find(AS, badvaddr);
2278 jancik 170
 
2318 jancik 171
        if ( pte == NULL ) {
172
            return PF_ACCESS_READ;
173
        }
2278 jancik 174
 
2304 kebrt 175
        /* check if read possible
176
        * Note: Don't check PTE_READABLE because it returns 1 everytimes */
2278 jancik 177
        if ( !PTE_PRESENT(pte) ) {
2304 kebrt 178
            return PF_ACCESS_READ;
2278 jancik 179
        }
2304 kebrt 180
 
2278 jancik 181
        if ( !PTE_WRITABLE(pte) ) {
182
            return PF_ACCESS_WRITE;
2304 kebrt 183
        } else {
184
            // badvaddr is present readable and writeable but error occured ... why?
185
            panic("page_fault - swap instruction, but address readable and writeable"
186
                "(instr_code:%X, badvaddr:%X)", instr, badvaddr);
2278 jancik 187
        }
188
    }
2304 kebrt 189
 
190
    panic("page_fault - instruction not access memory (instr_code: %x, badvaddr:%x)",
191
        instr, badvaddr);
192
 
2278 jancik 193
    return PF_ACCESS_EXEC;
194
}
195
 
2304 kebrt 196
/** Handles "data abort" exception (load or store at invalid address).
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 *
2362 jancik 198
 * @param exc_no    exception number
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 * @param istate    CPU state when exception occured
2278 jancik 200
 */
2304 kebrt 201
void data_abort(int exc_no, istate_t *istate)
202
{
203
    fault_status_t fsr = read_fault_status_register();
204
    uintptr_t badvaddr = read_fault_address_register();
2278 jancik 205
 
2304 kebrt 206
    pf_access_t access = get_memory_access_type(istate->pc, badvaddr);
207
 
208
    int ret = as_page_fault(badvaddr, access, istate);
2278 jancik 209
 
2304 kebrt 210
    if (ret == AS_PF_FAULT) {
211
        print_istate(istate);
212
        dprintf("page fault - pc: %x, va: %x, status: %x(%x), access:%d\n",
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            istate->pc, badvaddr, fsr.status, fsr, access);
2278 jancik 214
 
2304 kebrt 215
        fault_if_from_uspace(istate, "Page fault: %#x", badvaddr);
2298 stepan 216
        panic("page fault\n");
2304 kebrt 217
    }
2278 jancik 218
}
219
 
2304 kebrt 220
/** Handles "prefetch abort" exception (instruction couldn't be executed).
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 *
2362 jancik 222
 * @param exc_no    exception number
223
 * @param istate    CPU state when exception occured
2278 jancik 224
 */
2304 kebrt 225
void prefetch_abort(int exc_no, istate_t *istate)
226
{
2298 stepan 227
    int ret = as_page_fault(istate->pc, PF_ACCESS_EXEC, istate);
2278 jancik 228
 
2304 kebrt 229
    if (ret == AS_PF_FAULT) {
230
        dprintf("prefetch_abort\n");
231
        print_istate(istate);
232
        panic("page fault - prefetch_abort at address: %x\n", istate->pc);
233
    }
2278 jancik 234
}
235
 
236
/** @}
237
 */
238