Rev 2278 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
---|---|---|---|
2128 | jermar | 1 | /* |
2238 | kebrt | 2 | * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
2128 | jermar | 3 | * All rights reserved. |
4 | * |
||
5 | * Redistribution and use in source and binary forms, with or without |
||
6 | * modification, are permitted provided that the following conditions |
||
7 | * are met: |
||
8 | * |
||
9 | * - Redistributions of source code must retain the above copyright |
||
10 | * notice, this list of conditions and the following disclaimer. |
||
11 | * - Redistributions in binary form must reproduce the above copyright |
||
12 | * notice, this list of conditions and the following disclaimer in the |
||
13 | * documentation and/or other materials provided with the distribution. |
||
14 | * - The name of the author may not be used to endorse or promote products |
||
15 | * derived from this software without specific prior written permission. |
||
16 | * |
||
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
||
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
||
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
||
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
||
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
||
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
||
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
||
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
||
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
||
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||
27 | */ |
||
28 | |||
29 | /** @addtogroup arm32mm |
||
30 | * @{ |
||
31 | */ |
||
32 | /** @file |
||
33 | */ |
||
34 | |||
35 | #ifndef KERN_arm32_PAGE_H_ |
||
36 | #define KERN_arm32_PAGE_H_ |
||
37 | |||
38 | #include <arch/mm/frame.h> |
||
2182 | jancik | 39 | #include <mm/mm.h> |
40 | #include <arch/exception.h> |
||
2128 | jermar | 41 | |
2182 | jancik | 42 | |
2128 | jermar | 43 | #define PAGE_WIDTH FRAME_WIDTH |
44 | #define PAGE_SIZE FRAME_SIZE |
||
45 | |||
46 | #define PAGE_COLOR_BITS 0 /* dummy */ |
||
47 | |||
48 | #ifndef __ASM__ |
||
49 | # define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) |
||
50 | # define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) |
||
51 | #else |
||
52 | # define KA2PA(x) ((x) - 0x80000000) |
||
53 | # define PA2KA(x) ((x) + 0x80000000) |
||
54 | #endif |
||
55 | |||
56 | #ifdef KERNEL |
||
57 | |||
2276 | jancik | 58 | #define PTL0_ENTRIES_ARCH (2<<12) // 4096 |
59 | #define PTL1_ENTRIES_ARCH 0 |
||
60 | #define PTL2_ENTRIES_ARCH 0 |
||
2241 | kebrt | 61 | /* coarse page tables used (256*4 = 1KB per page) */ |
2276 | jancik | 62 | #define PTL3_ENTRIES_ARCH (2<<8) // 256 |
2128 | jermar | 63 | |
2276 | jancik | 64 | #define PTL0_SIZE_ARCH FOUR_FRAMES |
65 | #define PTL1_SIZE_ARCH 0 |
||
66 | #define PTL2_SIZE_ARCH 0 |
||
67 | #define PTL3_SIZE_ARCH ONE_FRAME |
||
2242 | kebrt | 68 | |
2276 | jancik | 69 | #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 20) & 0xfff) |
70 | #define PTL1_INDEX_ARCH(vaddr) 0 |
||
71 | #define PTL2_INDEX_ARCH(vaddr) 0 |
||
72 | #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x0ff) |
||
2128 | jermar | 73 | |
2276 | jancik | 74 | #define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *)( (((pte_level0_t*)(ptl0))[(i)]).coarse_table_addr << 10 )) |
75 | #define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1) |
||
76 | #define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2) |
||
77 | #define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((uintptr_t)( (((pte_level1_t*)(ptl3))[(i)]).frame_base_addr << 12 )) |
||
2128 | jermar | 78 | |
2276 | jancik | 79 | #define SET_PTL0_ADDRESS_ARCH(ptl0) (set_ptl0_addr((pte_level0_t *)(ptl0))) |
80 | #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_level0_t *)(ptl0))[(i)].coarse_table_addr = (a)>>10) |
||
2147 | jancik | 81 | #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
82 | #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
||
2276 | jancik | 83 | #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_level1_t *)(ptl3))[(i)].frame_base_addr = (a)>>12) |
2128 | jermar | 84 | |
2276 | jancik | 85 | #define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_level0_flags((pte_level0_t *)(ptl0), (index_t)(i)) |
86 | #define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT |
||
87 | #define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT |
||
88 | #define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_level1_flags((pte_level1_t *)(ptl3), (index_t)(i)) |
||
2128 | jermar | 89 | |
2276 | jancik | 90 | #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_level0_flags((pte_level0_t *)(ptl0), (index_t)(i), (x)) |
2147 | jancik | 91 | #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
92 | #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
||
2276 | jancik | 93 | #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_level1_flags((pte_level1_t *)(ptl3), (index_t)(i), (x)) |
2128 | jermar | 94 | |
2276 | jancik | 95 | #define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0) |
96 | #define PTE_PRESENT_ARCH(pte) ( ((pte_level0_t *)(pte))->descriptor_type != 0 ) |
||
2241 | kebrt | 97 | |
98 | /* pte should point into ptl3 */ |
||
2276 | jancik | 99 | #define PTE_GET_FRAME_ARCH(pte) ( ((pte_level1_t *)(pte))->frame_base_addr << FRAME_WIDTH) |
2241 | kebrt | 100 | /* pte should point into ptl3 */ |
2276 | jancik | 101 | #define PTE_WRITABLE_ARCH(pte) ( ((pte_level1_t *)(pte))->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW ) |
102 | #define PTE_EXECUTABLE_ARCH(pte) 1 |
||
2241 | kebrt | 103 | |
2329 | kebrt | 104 | |
2128 | jermar | 105 | #ifndef __ASM__ |
106 | |||
2276 | jancik | 107 | /** Level 0 page table entry. */ |
108 | typedef struct { |
||
109 | /* 01b for coarse tables, see below for details */ |
||
110 | unsigned descriptor_type : 2; |
||
111 | unsigned impl_specific : 3; |
||
112 | unsigned domain : 4; |
||
113 | unsigned should_be_zero : 1; |
||
114 | /* Pointer to the coarse 2nd level page table (holding entries for small (4KB) |
||
115 | * or large (64KB) pages. ARM also supports fine 2nd level page tables that |
||
116 | * may hold even tiny pages (1KB) but they are bigger (4KB per table in comparison |
||
117 | * with 1KB per the coarse table) |
||
118 | */ |
||
119 | unsigned coarse_table_addr : 22; |
||
120 | } __attribute__ ((packed)) pte_level0_t; |
||
121 | |||
2329 | kebrt | 122 | |
123 | /** Level 1 page table entry (small (4KB) pages used). */ |
||
2276 | jancik | 124 | typedef struct { |
125 | /* 0b10 for small pages */ |
||
126 | unsigned descriptor_type : 2; |
||
127 | unsigned bufferable : 1; |
||
128 | unsigned cacheable : 1; |
||
129 | /* access permissions for each of 4 subparts of a page |
||
130 | * (for each 1KB when small pages used */ |
||
131 | unsigned access_permission_0 : 2; |
||
132 | unsigned access_permission_1 : 2; |
||
133 | unsigned access_permission_2 : 2; |
||
134 | unsigned access_permission_3 : 2; |
||
135 | unsigned frame_base_addr : 20; |
||
136 | } __attribute__ ((packed)) pte_level1_t; |
||
137 | |||
138 | |||
139 | /* Level 1 page tables access permissions */ |
||
140 | |||
2329 | kebrt | 141 | /** User mode: no access, privileged mode: no access. */ |
2276 | jancik | 142 | #define PTE_AP_USER_NO_KERNEL_NO 0 |
2329 | kebrt | 143 | /** User mode: no access, privileged mode: read/write. */ |
2276 | jancik | 144 | #define PTE_AP_USER_NO_KERNEL_RW 1 |
2329 | kebrt | 145 | /** User mode: read only, privileged mode: read/write. */ |
2276 | jancik | 146 | #define PTE_AP_USER_RO_KERNEL_RW 2 |
2329 | kebrt | 147 | /** User mode: read/write, privileged mode: read/write. */ |
2276 | jancik | 148 | #define PTE_AP_USER_RW_KERNEL_RW 3 |
149 | |||
150 | |||
151 | /* pte_level0_t and pte_level1_t descriptor_type flags */ |
||
152 | |||
2329 | kebrt | 153 | /** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type). */ |
2276 | jancik | 154 | #define PTE_DESCRIPTOR_NOT_PRESENT 0 |
2329 | kebrt | 155 | /** pte_level0_t coarse page table flag (used in descriptor_type). */ |
2276 | jancik | 156 | #define PTE_DESCRIPTOR_COARSE_TABLE 1 |
2329 | kebrt | 157 | /** pte_level1_t small page table flag (used in descriptor type). */ |
2276 | jancik | 158 | #define PTE_DESCRIPTOR_SMALL_PAGE 2 |
159 | |||
160 | |||
2329 | kebrt | 161 | /** Sets the address of level 0 page table. |
2241 | kebrt | 162 | * |
2329 | kebrt | 163 | * @param pt Pointer to the page table to set. |
2182 | jancik | 164 | */ |
2238 | kebrt | 165 | static inline void set_ptl0_addr( pte_level0_t* pt) |
166 | { |
||
2276 | jancik | 167 | asm volatile ( |
168 | "mcr p15, 0, %0, c2, c0, 0 \n" |
||
169 | : |
||
170 | : "r"(pt) |
||
171 | ); |
||
2182 | jancik | 172 | } |
2128 | jermar | 173 | |
2329 | kebrt | 174 | |
2263 | kebrt | 175 | /** Returns level 0 page table entry flags. |
2241 | kebrt | 176 | * |
2329 | kebrt | 177 | * @param pt Level 0 page table. |
178 | * @param i Index of the entry to return. |
||
2241 | kebrt | 179 | */ |
2147 | jancik | 180 | static inline int get_pt_level0_flags(pte_level0_t *pt, index_t i) |
2128 | jermar | 181 | { |
2238 | kebrt | 182 | pte_level0_t *p = &pt[i]; |
2147 | jancik | 183 | |
2256 | kebrt | 184 | return |
185 | ( (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT ) | |
||
2241 | kebrt | 186 | ( 1 << PAGE_USER_SHIFT ) | |
187 | ( 1 << PAGE_READ_SHIFT ) | |
||
188 | ( 1 << PAGE_WRITE_SHIFT ) | |
||
189 | ( 1 << PAGE_EXEC_SHIFT ) | |
||
190 | ( 1 << PAGE_CACHEABLE_SHIFT ) |
||
2256 | kebrt | 191 | ; |
2238 | kebrt | 192 | } |
2147 | jancik | 193 | |
2329 | kebrt | 194 | |
2263 | kebrt | 195 | /** Returns level 1 page table entry flags. |
2241 | kebrt | 196 | * |
2329 | kebrt | 197 | * @param pt Level 1 page table. |
198 | * @param i Index of the entry to return. |
||
2241 | kebrt | 199 | */ |
2149 | jancik | 200 | static inline int get_pt_level1_flags(pte_level1_t *pt, index_t i) |
2147 | jancik | 201 | { |
2241 | kebrt | 202 | pte_level1_t *p = &pt[i]; |
2128 | jermar | 203 | |
2256 | kebrt | 204 | return |
205 | ( (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) | |
||
206 | ( (p->access_permission_0 == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT ) | |
||
207 | ( (p->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) << PAGE_READ_SHIFT ) | |
||
208 | ( (p->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) << PAGE_WRITE_SHIFT ) | |
||
2259 | jancik | 209 | ( (p->access_permission_0 != PTE_AP_USER_NO_KERNEL_RW) << PAGE_USER_SHIFT ) | |
210 | ( (p->access_permission_0 == PTE_AP_USER_NO_KERNEL_RW) << PAGE_READ_SHIFT ) | |
||
211 | ( (p->access_permission_0 == PTE_AP_USER_NO_KERNEL_RW) << PAGE_WRITE_SHIFT ) | |
||
2147 | jancik | 212 | ( 1 << PAGE_EXEC_SHIFT ) | |
2241 | kebrt | 213 | ( p->bufferable << PAGE_CACHEABLE ) |
2256 | kebrt | 214 | ; |
2147 | jancik | 215 | } |
216 | |||
2329 | kebrt | 217 | |
2263 | kebrt | 218 | /** Sets flags of level 0 page table entry. |
2241 | kebrt | 219 | * |
2329 | kebrt | 220 | * @param pt level 0 page table |
221 | * @param i index of the entry to be changed |
||
222 | * @param flags new flags |
||
2241 | kebrt | 223 | */ |
2147 | jancik | 224 | static inline void set_pt_level0_flags(pte_level0_t *pt, index_t i, int flags) |
2128 | jermar | 225 | { |
2147 | jancik | 226 | pte_level0_t *p = &pt[i]; |
2256 | kebrt | 227 | |
2241 | kebrt | 228 | if (flags & PAGE_NOT_PRESENT) { |
2256 | kebrt | 229 | p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; |
2263 | kebrt | 230 | // ensures that the entry will be recognized as valid when PTE_VALID_ARCH applied |
2259 | jancik | 231 | p->should_be_zero = 1; |
2238 | kebrt | 232 | } else { |
2256 | kebrt | 233 | p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; |
2259 | jancik | 234 | p->should_be_zero = 0; |
2147 | jancik | 235 | } |
2128 | jermar | 236 | } |
237 | |||
2329 | kebrt | 238 | |
2263 | kebrt | 239 | /** Sets flags of level 1 page table entry. |
2241 | kebrt | 240 | * |
2263 | kebrt | 241 | * We use same access rights for the whole page. When page is not preset we |
242 | * store 1 in acess_rigts_3 so that at least one bit is 1 (to mark correct |
||
243 | * page entry, see #PAGE_VALID_ARCH). |
||
2241 | kebrt | 244 | * |
2329 | kebrt | 245 | * @param pt Level 1 page table. |
246 | * @param i Index of the entry to be changed. |
||
247 | * @param flags New flags. |
||
2147 | jancik | 248 | */ |
249 | static inline void set_pt_level1_flags(pte_level1_t *pt, index_t i, int flags) |
||
250 | { |
||
251 | pte_level1_t *p = &pt[i]; |
||
252 | |||
2241 | kebrt | 253 | if (flags & PAGE_NOT_PRESENT) { |
2256 | kebrt | 254 | p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; |
2259 | jancik | 255 | p->access_permission_3 = 1; |
2238 | kebrt | 256 | } else { |
2256 | kebrt | 257 | p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; |
2259 | jancik | 258 | p->access_permission_3 = p->access_permission_0; |
2238 | kebrt | 259 | } |
2147 | jancik | 260 | |
2238 | kebrt | 261 | p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0; |
262 | |||
2241 | kebrt | 263 | /* default access permission */ |
2238 | kebrt | 264 | p->access_permission_0 = p->access_permission_1 = |
2256 | kebrt | 265 | p->access_permission_2 = p->access_permission_3 = PTE_AP_USER_NO_KERNEL_RW; |
2238 | kebrt | 266 | |
2241 | kebrt | 267 | if (flags & PAGE_USER) { |
268 | if (flags & PAGE_READ) { |
||
2238 | kebrt | 269 | p->access_permission_0 = p->access_permission_1 = |
270 | p->access_permission_2 = p->access_permission_3 = |
||
2256 | kebrt | 271 | PTE_AP_USER_RO_KERNEL_RW; |
2238 | kebrt | 272 | } |
2241 | kebrt | 273 | if (flags & PAGE_WRITE) { |
2238 | kebrt | 274 | p->access_permission_0 = p->access_permission_1 = |
275 | p->access_permission_2 = p->access_permission_3 = |
||
2256 | kebrt | 276 | PTE_AP_USER_RW_KERNEL_RW; |
2238 | kebrt | 277 | } |
278 | } |
||
2147 | jancik | 279 | } |
280 | |||
2258 | jancik | 281 | |
2128 | jermar | 282 | extern void page_arch_init(void); |
283 | |||
2258 | jancik | 284 | |
2128 | jermar | 285 | #endif /* __ASM__ */ |
286 | |||
287 | #endif /* KERNEL */ |
||
288 | |||
289 | #endif |
||
290 | |||
291 | /** @} |
||
292 | */ |
||
2147 | jancik | 293 |