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| Rev | Author | Line No. | Line |
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| 3528 | pillai | 1 | /* |
| 2 | * Copyright (c) 2007 Michal Kebrt |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | /** @addtogroup arm32qemu_icp GXemul |
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| 30 | * @brief GXemul machine specific parts. |
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| 31 | * @ingroup arm32 |
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| 32 | * @{ |
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| 33 | */ |
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| 34 | /** @file |
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| 35 | * @brief GXemul peripheries drivers declarations. |
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| 36 | */ |
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| 37 | |||
| 38 | #ifndef KERN_arm32_QEMU_ICP_H_ |
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| 39 | #define KERN_arm32_QEMU_ICP_H_ |
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| 40 | |||
| 41 | #include <console/chardev.h> |
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| 42 | |||
| 43 | /** Last interrupt number (beginning from 0) whose status is probed |
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| 44 | * from interrupt controller |
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| 45 | */ |
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| 46 | #define QEMU_ICP_IRQC_MAX_IRQ 8 |
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| 47 | |||
| 48 | /** Timer frequency */ |
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| 4628 | pillai | 49 | #define QEMU_ICP_TIMER_FREQ 10000 |
| 3528 | pillai | 50 | |
| 51 | /** Struct containing mappings of qemu_icp HW devices into kernel part |
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| 52 | * of virtual address space. |
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| 53 | */ |
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| 54 | typedef struct { |
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| 4634 | pillai | 55 | uintptr_t uart; |
| 4628 | pillai | 56 | uintptr_t kbd_ctrl; |
| 57 | uintptr_t kbd_stat; |
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| 58 | uintptr_t kbd_data; |
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| 59 | uintptr_t kbd_intstat; |
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| 3528 | pillai | 60 | uintptr_t rtc; |
| 4612 | pillai | 61 | uintptr_t rtc1_load; |
| 62 | uintptr_t rtc1_read; |
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| 63 | uintptr_t rtc1_ctl; |
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| 64 | uintptr_t rtc1_intrclr; |
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| 65 | uintptr_t rtc1_bgload; |
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| 3528 | pillai | 66 | uintptr_t irqc; |
| 67 | uintptr_t irqc_mask; |
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| 68 | uintptr_t irqc_unmask; |
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| 69 | uintptr_t vga; |
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| 70 | uintptr_t cmcr; |
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| 4634 | pillai | 71 | uintptr_t sdramcr; |
| 3528 | pillai | 72 | } qemu_icp_hw_map_t; |
| 73 | |||
| 74 | extern void qemu_icp_hw_map_init(void); |
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| 75 | extern void qemu_icp_console_init(devno_t devno); |
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| 76 | extern void qemu_icp_release_console(void); |
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| 77 | extern void qemu_icp_grab_console(void); |
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| 78 | extern void qemu_icp_timer_irq_start(void); |
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| 79 | extern void qemu_icp_debug_putc(char ch); |
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| 80 | extern void qemu_icp_cpu_halt(void); |
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| 81 | extern void qemu_icp_irq_exception(int exc_no, istate_t *istate); |
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| 82 | extern size_t qemu_icp_get_memory_size(void); |
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| 83 | extern uintptr_t qemu_icp_get_fb_address(void); |
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| 3529 | pillai | 84 | extern void qemu_icp_fb_init(void); |
| 4634 | pillai | 85 | extern void qemu_icp_frame_init(void); |
| 3528 | pillai | 86 | #endif |
| 87 | |||
| 88 | /** @} |
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| 89 | */ |