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/*
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 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup arm32boot
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 * @{
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 */
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/** @file
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 *  @brief Memory management used while booting the kernel.
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 */
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#include "mm.h"
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/** Initializes "section" page table entry.
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 *
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 *  Will be readable/writable by kernel with no access from user mode.
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 *  Will belong to domain 0. No cache or buffering is enabled.
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 *  
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 *  @param pte    Section entry to initialize.
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 *  @param frame  First frame in the section (frame number).
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 *
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 *  @note         If frame is not 1MB aligned, first lower 1MB aligned frame will be used.
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 */  
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static void init_pte_level0_section(pte_level0_section_t* pte, unsigned int frame)
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{
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    pte->descriptor_type   = PTE_DESCRIPTOR_SECTION;
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    pte->bufferable        = 0;
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    pte->cacheable         = 0;
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    pte->impl_specific     = 0;
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    pte->domain            = 0;
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    pte->should_be_zero_1  = 0;
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    pte->access_permission = PTE_AP_USER_NO_KERNEL_RW; 
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    pte->should_be_zero_2  = 0;
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    pte->section_base_addr = frame;
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}
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/** Initializes page table used while booting the kernel. */
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static void init_page_table(void)
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{
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    int i;
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    const unsigned int first_kernel_page = ADDR2PFN(PA2KA(0));
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    // create 1:1 virtual-physical mapping (in lower 2GB)
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    for (i = 0; i < first_kernel_page; i++) {
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        init_pte_level0_section(&page_table[i], i);
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    }
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    // create 1:1 virtual-physical mapping in kernel space (upper 2GB),
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    // physical addresses start from 0
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    for (i = first_kernel_page; i < PTL0_ENTRIES; i++) {
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        init_pte_level0_section(&page_table[i], i - first_kernel_page);
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    }
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}
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/** Starts the MMU - initializes page table and enables paging. */
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void mmu_start() {
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    init_page_table();
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    set_ptl0_address(page_table);
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    enable_paging();
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}
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/** @}
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 */
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