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1 jermar 1 
/*
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 * Copyright (C) 2001-2004 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#include <arch/cpu.h>
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#include <cpu.h>
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#include <arch.h>
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#include <arch/cp0.h>
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#include <typedefs.h>
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struct {
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	char *vendor;
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	char *model;
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} imp_data[] = {
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	{ "Invalid", "Invalid" },	/* 0x00 */
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	{ "MIPS", "R2000" },		/* 0x01 */
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	{ "MIPS", "R3000" },		/* 0x02 */
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	{ "MIPS", "R6000" },		/* 0x03 */
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	{ "MIPS", " R4000/R4400" }, 	/* 0x04 */
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	{ "LSI Logic", "R3000" },	/* 0x05 */
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	{ "MIPS", "R6000A" },		/* 0x06 */
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	{ "IDT", "3051/3052" },		/* 0x07 */
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	{ "Invalid", "Invalid" },	/* 0x08 */
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	{ "MIPS", "R10000/T5" },	/* 0x09 */
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	{ "MIPS", "R4200" },		/* 0x0a */
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	{ "Unknown", "Unknown" },	/* 0x0b */
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	{ "Unknown", "Unknown" },	/* 0x0c */
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	{ "Invalid", "Invalid" },	/* 0x0d */
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	{ "Invalid", "Invalid" },	/* 0x0e */
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	{ "Invalid", "Invalid" },	/* 0x0f */
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	{ "MIPS", "R8000" },		/* 0x10 */
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	{ "Invalid", "Invalid" },	/* 0x11 */
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	{ "Invalid", "Invalid" },	/* 0x12 */
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	{ "Invalid", "Invalid" },	/* 0x13 */
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	{ "Invalid", "Invalid" },	/* 0x14 */
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	{ "Invalid", "Invalid" },	/* 0x15 */
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	{ "Invalid", "Invalid" },	/* 0x16 */
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	{ "Invalid", "Invalid" },	/* 0x17 */
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	{ "Invalid", "Invalid" },	/* 0x18 */
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	{ "Invalid", "Invalid" },	/* 0x19 */
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	{ "Invalid", "Invalid" },  	/* 0x1a */
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	{ "Invalid", "Invalid" },	/* 0x1b */
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	{ "Invalid", "Invalid" },	/* 0x1c */
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	{ "Invalid", "Invalid" },	/* 0x1d */
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	{ "Invalid", "Invalid" },	/* 0x1e */
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	{ "Invalid", "Invalid" },	/* 0x1f */
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	{ "QED", "R4600" },		/* 0x20 */
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	{ "Sony", "R3000" },		/* 0x21 */
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	{ "Toshiba", "R3000" },		/* 0x22 */
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	{ "NKK", "R3000" }		/* 0x23 */
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};
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void cpu_arch_init(void)
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{
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}
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void cpu_identify(void)
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{
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	CPU->arch.rev_num = cp0_prid_read() & 0xff;
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	CPU->arch.imp_num = (cp0_prid_read() >> 8) & 0xff;
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}
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void cpu_print_report(cpu_t *m)
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{
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	printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n",
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		m->id, imp_data[m->arch.imp_num].vendor, imp_data[m->arch.imp_num].model, m->arch.rev_num >> 4, m->arch.rev_num & 0xf, m->arch.imp_num);
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}